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Tue, 5 May 2020 21:41:38 -0400 (EDT) From: Alistair Francis To: broonie@kernel.org, linux-spi@vger.kernel.org Subject: [PATCH] spi: sun6i: Add support for GPIO chip select lines Date: Tue, 5 May 2020 18:41:35 -0700 Message-Id: <20200506014135.2941967-1-alistair@alistair23.me> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200505_184152_630109_CFA28ACE X-CRM114-Status: GOOD ( 11.14 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [66.111.4.27 listed in list.dnswl.org] 0.0 SPF_NONE SPF: sender does not publish an SPF Record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , linux-kernel@vger.kernel.org, mripard@kernel.org, wens@csie.org, alistair23@gmail.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add a setup function that can be used to support using generic GPIO lines for the chip select. Signed-off-by: Alistair Francis --- drivers/spi/spi-sun6i.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index ec7967be9e2f..fd4e19434942 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -171,6 +172,31 @@ static inline void sun6i_spi_fill_fifo(struct sun6i_spi *sspi, int len) } } +static int sun6i_spi_setup(struct spi_device *spi) +{ + int ret; + + /* sanity check for native cs */ + if (spi->mode & SPI_NO_CS) + return 0; + if (gpio_is_valid(spi->cs_gpio)) { + /* with gpio-cs set the GPIO to the correct level + * and as output (in case the dt has the gpio not configured + * as output but native cs) + */ + ret = gpio_direction_output(spi->cs_gpio, + (spi->mode & SPI_CS_HIGH) ? 0 : 1); + if (ret) + dev_err(&spi->dev, + "could not set gpio %i as output: %i\n", + spi->cs_gpio, ret); + + return ret; + } + + return 0; +} + static void sun6i_spi_set_cs(struct spi_device *spi, bool enable) { struct sun6i_spi *sspi = spi_master_get_devdata(spi->master); @@ -470,6 +496,7 @@ static int sun6i_spi_probe(struct platform_device *pdev) master->max_speed_hz = 100 * 1000 * 1000; master->min_speed_hz = 3 * 1000; + master->setup = sun6i_spi_setup; master->set_cs = sun6i_spi_set_cs; master->transfer_one = sun6i_spi_transfer_one; master->num_chipselect = 4;