diff mbox series

[v2] ARM: dts: ls1021a: output PPS signal on FIPER2

Message ID 20200519025307.628-1-yangbo.lu@nxp.com (mailing list archive)
State Mainlined
Commit 5656bb3857c4904d1dec6e1b8f876c1c0337274e
Headers show
Series [v2] ARM: dts: ls1021a: output PPS signal on FIPER2 | expand

Commit Message

Yangbo Lu May 19, 2020, 2:53 a.m. UTC
The timer fixed interval period pulse generator register
is used to generate periodic pulses. The down count
register loads the value programmed in the fixed period
interval (FIPER). At every tick of the timer accumulator
overflow, the counter decrements by the value of
TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
counter value reaches zero. It reloads the down counter
in the cycle following a pulse. To use the TMR_FIPER
register to generate a 1 PPS event, the value
(10^9 nanoseconds) - TCLK_PERIOD should be programmed.
It should be 999999995 since TCLK_PERIOD is 5.

This patch is to output PPS signal on FIPER2 which is more
desired by user.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
Changes for v2:
	- Added more discription in commit message.
---
 arch/arm/boot/dts/ls1021a.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Richard Cochran May 19, 2020, 4:15 p.m. UTC | #1
On Tue, May 19, 2020 at 10:53:07AM +0800, Yangbo Lu wrote:
> The timer fixed interval period pulse generator register
> is used to generate periodic pulses. The down count
> register loads the value programmed in the fixed period
> interval (FIPER). At every tick of the timer accumulator
> overflow, the counter decrements by the value of
> TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
> counter value reaches zero. It reloads the down counter
> in the cycle following a pulse. To use the TMR_FIPER
> register to generate a 1 PPS event, the value
> (10^9 nanoseconds) - TCLK_PERIOD should be programmed.
> It should be 999999995 since TCLK_PERIOD is 5.
> 
> This patch is to output PPS signal on FIPER2 which is more
> desired by user.

I think it wouldn't hurt to spell out the effect of this change:
Before, the period of FIPER2 was 100 microseconds.
Now, the period of FIPER2 is one second.

Thanks,
Richard
Yangbo Lu May 22, 2020, 1:37 a.m. UTC | #2
> -----Original Message-----
> From: Richard Cochran <richardcochran@gmail.com>
> Sent: Wednesday, May 20, 2020 12:15 AM
> To: Y.b. Lu <yangbo.lu@nxp.com>
> Cc: linux-arm-kernel@lists.infradead.org; Shawn Guo <shawnguo@kernel.org>;
> Leo Li <leoyang.li@nxp.com>
> Subject: Re: [v2] ARM: dts: ls1021a: output PPS signal on FIPER2
> 
> On Tue, May 19, 2020 at 10:53:07AM +0800, Yangbo Lu wrote:
> > The timer fixed interval period pulse generator register
> > is used to generate periodic pulses. The down count
> > register loads the value programmed in the fixed period
> > interval (FIPER). At every tick of the timer accumulator
> > overflow, the counter decrements by the value of
> > TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
> > counter value reaches zero. It reloads the down counter
> > in the cycle following a pulse. To use the TMR_FIPER
> > register to generate a 1 PPS event, the value
> > (10^9 nanoseconds) - TCLK_PERIOD should be programmed.
> > It should be 999999995 since TCLK_PERIOD is 5.
> >
> > This patch is to output PPS signal on FIPER2 which is more
> > desired by user.
> 
> I think it wouldn't hurt to spell out the effect of this change:
> Before, the period of FIPER2 was 100 microseconds.
> Now, the period of FIPER2 is one second.

Yes. I sent out the v3 to mentioned the effect of the change.
Thanks!

> 
> Thanks,
> Richard
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 760a68c..b2ff27a 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -772,7 +772,7 @@ 
 			fsl,tmr-prsc    = <2>;
 			fsl,tmr-add     = <0xaaaaaaab>;
 			fsl,tmr-fiper1  = <999999995>;
-			fsl,tmr-fiper2  = <99990>;
+			fsl,tmr-fiper2  = <999999995>;
 			fsl,max-adj     = <499999999>;
 			fsl,extts-fifo;
 		};