| Message ID | 20200520034307.20435-9-andrew-sh.cheng@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add cpufreq and cci devfreq for mt8183, and SVS support | expand |
Hi, On 5/20/20 12:43 PM, Andrew-sh.Cheng wrote: > This adds dt-binding documentation of cci devfreq > for Mediatek MT8183 SoC platform. > > Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> > --- > .../devicetree/bindings/devfreq/mt8183-cci.yaml | 51 ++++++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml > > diff --git a/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml > new file mode 100644 > index 000000000000..a7341fd94097 > --- /dev/null > +++ b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: https://protect2.fireeye.com/url?k=33f1f15d-6e23ea05-33f07a12-0cc47a31c8b4-91b3f8aeecce95dc&q=1&u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdevfreq%2Fmt8183-cci.yaml%23 > +$schema: https://protect2.fireeye.com/url?k=fc7d9089-a1af8bd1-fc7c1bc6-0cc47a31c8b4-b46f5afc59faf86d&q=1&u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23 > + > +title: CCI_DEVFREQ driver for MT8183. > + > +maintainers: > + - Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> > + > +description: | > + This module is used to create CCI DEVFREQ. > + The performance will depend on both CCI frequency and CPU frequency. > + For MT8183, CCI co-buck with Little core. > + Contain CCI opp table for voltage and frequency scaling. > + > +properties: > + compatible: > + const: "mediatek,mt8183-cci" > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: "cci" > + > + operating-points-v2: true > + opp-table: true > + > + proc-supply: > + description: > + Phandle of the regulator that provides the supply voltage. > + > +required: > + - compatible > + - clocks > + - clock-names > + - proc-supply > + > +examples: > + - | > + #include <dt-bindings/clock/mt8183-clk.h> > + cci: cci { > + compatible = "mediatek,mt8183-cci"; > + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; > + clock-names = "cci"; > + operating-points-v2 = <&cci_opp>; > + proc-supply = <&mt6358_vproc12_reg>; > + }; > + > I recommend that add the more detailed example with OPP table with CPU node.
On Thu, 2020-05-28 at 16:42 +0900, Chanwoo Choi wrote: > Hi, > > On 5/20/20 12:43 PM, Andrew-sh.Cheng wrote: > > This adds dt-binding documentation of cci devfreq > > for Mediatek MT8183 SoC platform. > > > > Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> > > --- > > .../devicetree/bindings/devfreq/mt8183-cci.yaml | 51 ++++++++++++++++++++++ > > 1 file changed, 51 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml > > > > diff --git a/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml > > new file mode 100644 > > index 000000000000..a7341fd94097 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml > > @@ -0,0 +1,51 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: https://protect2.fireeye.com/url?k=33f1f15d-6e23ea05-33f07a12-0cc47a31c8b4-91b3f8aeecce95dc&q=1&u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdevfreq%2Fmt8183-cci.yaml%23 > > +$schema: https://protect2.fireeye.com/url?k=fc7d9089-a1af8bd1-fc7c1bc6-0cc47a31c8b4-b46f5afc59faf86d&q=1&u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23 > > + > > +title: CCI_DEVFREQ driver for MT8183. > > + > > +maintainers: > > + - Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> > > + > > +description: | > > + This module is used to create CCI DEVFREQ. > > + The performance will depend on both CCI frequency and CPU frequency. > > + For MT8183, CCI co-buck with Little core. > > + Contain CCI opp table for voltage and frequency scaling. > > + > > +properties: > > + compatible: > > + const: "mediatek,mt8183-cci" > > + > > + clocks: > > + maxItems: 1 > > + > > + clock-names: > > + const: "cci" > > + > > + operating-points-v2: true > > + opp-table: true > > + > > + proc-supply: > > + description: > > + Phandle of the regulator that provides the supply voltage. > > + > > +required: > > + - compatible > > + - clocks > > + - clock-names > > + - proc-supply > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/mt8183-clk.h> > > + cci: cci { > > + compatible = "mediatek,mt8183-cci"; > > + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; > > + clock-names = "cci"; > > + operating-points-v2 = <&cci_opp>; > > + proc-supply = <&mt6358_vproc12_reg>; > > + }; > > + > > > > I recommend that add the more detailed example > with OPP table with CPU node. > Hi Chanwoo Choi, Actually, for previous versions of my patch set, I didn't use governor_passive as cci_devfreq governor. So I think it is okay that not provide CPU OPP node for this cci device node. >
diff --git a/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml new file mode 100644 index 000000000000..a7341fd94097 --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/devfreq/mt8183-cci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CCI_DEVFREQ driver for MT8183. + +maintainers: + - Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> + +description: | + This module is used to create CCI DEVFREQ. + The performance will depend on both CCI frequency and CPU frequency. + For MT8183, CCI co-buck with Little core. + Contain CCI opp table for voltage and frequency scaling. + +properties: + compatible: + const: "mediatek,mt8183-cci" + + clocks: + maxItems: 1 + + clock-names: + const: "cci" + + operating-points-v2: true + opp-table: true + + proc-supply: + description: + Phandle of the regulator that provides the supply voltage. + +required: + - compatible + - clocks + - clock-names + - proc-supply + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + cci: cci { + compatible = "mediatek,mt8183-cci"; + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; + clock-names = "cci"; + operating-points-v2 = <&cci_opp>; + proc-supply = <&mt6358_vproc12_reg>; + }; +
This adds dt-binding documentation of cci devfreq for Mediatek MT8183 SoC platform. Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> --- .../devicetree/bindings/devfreq/mt8183-cci.yaml | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml