Message ID | 20200609110846.4029620-1-noltari@gmail.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | cf8030d7035bd3e89c9e66f7193a7fc8057a9b9a |
Headers | show |
Series | clk: bcm63xx-gate: fix last clock availability | expand |
On 6/9/2020 4:08 AM, Álvaro Fernández Rojas wrote: > In order to make the last clock available, maxbit has to be set to the > highest bit value plus 1. > > Fixes: 1c099779c1e2 ("clk: add BCM63XX gated clock controller driver") > Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Quoting Álvaro Fernández Rojas (2020-06-09 04:08:46) > In order to make the last clock available, maxbit has to be set to the > highest bit value plus 1. > > Fixes: 1c099779c1e2 ("clk: add BCM63XX gated clock controller driver") > Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> > --- Applied to clk-next
diff --git a/drivers/clk/bcm/clk-bcm63xx-gate.c b/drivers/clk/bcm/clk-bcm63xx-gate.c index 98e884957db8..911a29bd744e 100644 --- a/drivers/clk/bcm/clk-bcm63xx-gate.c +++ b/drivers/clk/bcm/clk-bcm63xx-gate.c @@ -155,6 +155,7 @@ static int clk_bcm63xx_probe(struct platform_device *pdev) for (entry = table; entry->name; entry++) maxbit = max_t(u8, maxbit, entry->bit); + maxbit++; hw = devm_kzalloc(&pdev->dev, struct_size(hw, data.hws, maxbit), GFP_KERNEL);
In order to make the last clock available, maxbit has to be set to the highest bit value plus 1. Fixes: 1c099779c1e2 ("clk: add BCM63XX gated clock controller driver") Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> --- drivers/clk/bcm/clk-bcm63xx-gate.c | 1 + 1 file changed, 1 insertion(+)