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[22/73] ARM: tegra: Add #reset-cells to Tegra124 memory controller

Message ID 20200616135238.3001888-23-thierry.reding@gmail.com (mailing list archive)
State New, archived
Headers show
Series ARM: tegra: Various fixes for DT schema validation | expand

Commit Message

Thierry Reding June 16, 2020, 1:51 p.m. UTC 
From: Thierry Reding <treding@nvidia.com>

The memory controller exposes a set of memory client resets and needs to
specify the #reset-cells property in order to advertise the number of
cells needed to describe each of the resets.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm/boot/dts/tegra124.dtsi | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 6d34742b56b9..98cd7962a559 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -622,6 +622,7 @@  mc: memory-controller@70019000 {
 		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 
 		#iommu-cells = <1>;
+		#reset-cells = <1>;
 	};
 
 	emc: external-memory-controller@7001b000 {