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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id h36sm3589304oth.37.2020.06.22.15.27.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jun 2020 15:27:44 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Dmitry Baryshkov , Manivannan Sadhasivam Subject: [PATCH 6/6] arm64: defconfig: Enable Qualcomm IPCC driver Date: Mon, 22 Jun 2020 15:27:47 -0700 Message-Id: <20200622222747.717306-7-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622222747.717306-1-bjorn.andersson@linaro.org> References: <20200622222747.717306-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:343 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The IPCC hardware block provides a mechanism for triggering interrupts between co-processors in recent Qualcomm SoCs. This is used as basis for most form of communication between co-processors, so enable this support. Signed-off-by: Bjorn Andersson Reviewed-by: Manivannan Sadhasivam --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5848799dcad0..b3d13e1a052a 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -834,6 +834,7 @@ CONFIG_IMX_MBOX=y CONFIG_PLATFORM_MHU=y CONFIG_BCM2835_MBOX=y CONFIG_QCOM_APCS_IPC=y +CONFIG_QCOM_IPCC=y CONFIG_ROCKCHIP_IOMMU=y CONFIG_TEGRA_IOMMU_SMMU=y CONFIG_ARM_SMMU=y