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dkim=none (message not signed) header.d=none; pengutronix.de; dmarc=none action=none header.from=oss.nxp.com; Received: from VI1PR0402MB3902.eurprd04.prod.outlook.com (2603:10a6:803:22::27) by VI1PR04MB6239.eurprd04.prod.outlook.com (2603:10a6:803:fd::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.21; Thu, 9 Jul 2020 16:47:58 +0000 Received: from VI1PR0402MB3902.eurprd04.prod.outlook.com ([fe80::4c0:79dd:b734:9ea7]) by VI1PR0402MB3902.eurprd04.prod.outlook.com ([fe80::4c0:79dd:b734:9ea7%5]) with mapi id 15.20.3153.029; Thu, 9 Jul 2020 16:47:58 +0000 From: Laurentiu Palcu To: Philipp Zabel , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Laurentiu Palcu Subject: [PATCH v5 4/5] dt-bindings: display: imx: add bindings for DCSS Date: Thu, 9 Jul 2020 19:47:32 +0300 Message-Id: <20200709164736.18291-5-laurentiu.palcu@oss.nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200709164736.18291-1-laurentiu.palcu@oss.nxp.com> References: <20200709164736.18291-1-laurentiu.palcu@oss.nxp.com> X-ClientProxiedBy: AM0PR03CA0041.eurprd03.prod.outlook.com (2603:10a6:208::18) To VI1PR0402MB3902.eurprd04.prod.outlook.com (2603:10a6:803:22::27) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from fsr-ub1864-141.ea.freescale.net (83.217.231.2) by AM0PR03CA0041.eurprd03.prod.outlook.com (2603:10a6:208::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.21 via Frontend Transport; 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Signed-off-by: Laurentiu Palcu Reviewed-by: Rob Herring --- .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 84 +++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml new file mode 100644 index 000000000000..a951409cf76d --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 NXP +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: iMX8MQ Display Controller Subsystem (DCSS) + +maintainers: + - Laurentiu Palcu + +description: + + The DCSS (display controller sub system) is used to source up to three + display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP + 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10 + image processing capabilities are included to provide a solution capable of + driving next generation high dynamic range displays. + +properties: + compatible: + const: nxp,imx8mq-dcss + + reg: + items: + - description: DCSS base address and size, up to IRQ steer start + - description: DCSS BLKCTL base address and size + + interrupts: + items: + - description: Context loader completion and error interrupt + - description: DTG interrupt used to signal context loader trigger time + - description: DTG interrupt for Vblank + + interrupt-names: + items: + - const: ctxld + - const: ctxld_kick + - const: vblank + + clocks: + items: + - description: Display APB clock for all peripheral PIO access interfaces + - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL + - description: RTRAM clock + - description: Pixel clock, can be driver either by HDMI phy clock or MIPI + - description: DTRC clock, needed by video decompressor + + clock-names: + items: + - const: apb + - const: axi + - const: rtrm + - const: pix + - const: dtrc + + port: + type: object + description: + A port node pointing to the input port of a HDMI/DP or MIPI display bridge. + +examples: + - | + dcss: display-controller@32e00000 { + compatible = "nxp,imx8mq-dcss"; + reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; + interrupts = <6>, <8>, <9>; + interrupt-names = "ctxld", "ctxld_kick", "vblank"; + interrupt-parent = <&irqsteer>; + clocks = <&clk 248>, <&clk 247>, <&clk 249>, + <&clk 254>,<&clk 122>; + clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; + assigned-clocks = <&clk 107>, <&clk 109>, <&clk 266>; + assigned-clock-parents = <&clk 78>, <&clk 78>, <&clk 3>; + assigned-clock-rates = <800000000>, + <400000000>; + port { + dcss_out: endpoint { + remote-endpoint = <&hdmi_in>; + }; + }; + }; +