diff mbox series

[v4] ARM: dts: vfxxx: Add node for CAAM

Message ID 20200711020245.6056-1-cphealy@gmail.com (mailing list archive)
State Mainlined
Commit 493e8733686bfce4fe04683dce8569a5e6c6d071
Headers show
Series [v4] ARM: dts: vfxxx: Add node for CAAM | expand

Commit Message

Chris Healy July 11, 2020, 2:02 a.m. UTC 
From: Andrey Smirnov <andrew.smirnov@gmail.com> 

Add node for CAAM device in NXP Vybrid SoC.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
v4:
- really add reviewed by from Fabio Estevam
v3:
- put version information in the correct place
- add reviewed by from Fabio Estevam
v2:
- fixup commit to show that this patch is from Andrey Smirnov

 arch/arm/boot/dts/vfxxx.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

Comments

Shawn Guo July 13, 2020, 9:07 a.m. UTC | #1 
On Fri, Jul 10, 2020 at 07:02:45PM -0700, Chris Healy wrote:
> From: Andrey Smirnov <andrew.smirnov@gmail.com> 
> 
> Add node for CAAM device in NXP Vybrid SoC.
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> Signed-off-by: Chris Healy <cphealy@gmail.com>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
> ---
> v4:
> - really add reviewed by from Fabio Estevam
> v3:
> - put version information in the correct place
> - add reviewed by from Fabio Estevam

I have picked up v2 with all these fixed up.

Shawn
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index 2d547e7b21ad..0fe03aa0367f 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -729,6 +729,28 @@ 
 				dma-names = "rx","tx";
 				status = "disabled";
 			};
+
+			crypto: crypto@400f0000 {
+				compatible = "fsl,sec-v4.0";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x400f0000 0x9000>;
+				ranges = <0 0x400f0000 0x9000>;
+				clocks = <&clks VF610_CLK_CAAM>;
+				clock-names = "ipg";
+
+				sec_jr0: jr0@1000 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x1000 0x1000>;
+					interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr1: jr1@2000 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x2000 0x1000>;
+					interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
+				};
+			};
 		};
 	};
 };