diff mbox series

[v1,5/5] ARM: dts: imx6qp: support improved enet clocking on QuadPlus

Message ID 20200713002512.28742-6-TheSven73@gmail.com (mailing list archive)
State New, archived
Headers show
Series imx6qp QuadPlus: support improved enet clocking | expand

Commit Message

Sven Van Asbroeck July 13, 2020, 12:25 a.m. UTC 
Board designers are now able to choose between all three supported
enet clocking methods, by changing the clocktree via the devicetree:

a) route enet_ref externally from pad to pad (the default):

no clock tree changes required

b) route internally on SoC from enet_ref

&fec {
    assigned-clocks = <&clks IMX6QDL_CLK_ENET_PTP>,
                      <&clks IMX6QDL_CLK_ENET_REF>;
    assigned-clock-parents = <&clks IMX6QDL_CLK_ENET_REF>;
    assigned-clock-rates = <0>, <125000000>;
};

c) route external clock (from PHY or oscillator) via pad

/ {
    clocks {
        phy_osc: anaclk3 {
            compatible = "fixed-clock";
            #clock-cells = <0>;
            clock-frequency = <125000000>;
       };
   };
};

&fec {
    assigned-clocks = <&clks IMX6QDL_CLK_ENET_PTP>,
                      <&clks IMX6QDL_CLK_ENET_PAD>;
    assigned-clock-parents = <&clks IMX6QDL_CLK_ENET_PAD>,
                             <&clks IMX6QDL_CLK_ANACLK3>;
};

Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com>
---

Tree: v5.8-rc4

To: Shawn Guo <shawnguo@kernel.org>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-clk@vger.kernel.org

 arch/arm/boot/dts/imx6qp.dtsi | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index b310f13a53f2..7f81d35f56c9 100644
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -79,6 +79,9 @@ 
 &fec {
 	interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
 		     <0 119 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&clks IMX6QDL_CLK_ENET>,
+		 <&clks IMX6QDL_CLK_ENET>,
+		 <&clks IMX6QDL_CLK_ENET_PTP>;
 };
 
 &gpc {