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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id j14sm23896642wrs.75.2020.07.13.06.29.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 06:29:46 -0700 (PDT) From: Alexandre Bailon To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, matthias.bgg@gmail.com Subject: [PATCH 6/6] ARM64: mt8183: Add support of APU to mt8183 Date: Mon, 13 Jul 2020 15:29:27 +0200 Message-Id: <20200713132927.24925-7-abailon@baylibre.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200713132927.24925-1-abailon@baylibre.com> References: <20200713132927.24925-1-abailon@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_092949_284221_2805FEFC X-CRM114-Status: GOOD ( 10.35 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:441 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Bailon , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This adds the support of APU to mt8183. Signed-off-by: Alexandre Bailon Reported-by: kernel test robot --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 42 ++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 1e03c849dc5d..6a2e9ee0b566 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -720,12 +720,54 @@ ipu_adl: syscon@19010000 { #clock-cells = <1>; }; + vpu0: vpu@0x19100000 { + compatible = "mediatek,mt8183-apu"; + reg = <0 0x19180000 0 0x14000>; + reg-names = "mmio"; + interrupts = ; + + iommus = <&iommu M4U_PORT_IMG_IPUO>, + <&iommu M4U_PORT_IMG_IPU3O>, + <&iommu M4U_PORT_IMG_IPUI>; + + clocks = <&ipu_core0 CLK_IPU_CORE0_AXI>, + <&ipu_core0 CLK_IPU_CORE0_IPU>, + <&ipu_core0 CLK_IPU_CORE0_JTAG>; + + clock-names = "axi", "ipu", "jtag"; + + power-domains = <&scpsys MT8183_POWER_DOMAIN_VPU_CORE0>; + memory-region = <&vpu_ram>; + }; + ipu_core0: syscon@19180000 { compatible = "mediatek,mt8183-ipu_core0", "syscon"; reg = <0 0x19180000 0 0x1000>; #clock-cells = <1>; }; + vpu1: vpu@0x19200000 { + compatible = "mediatek,mt8183-apu"; + reg = <0 0x19280000 0 0x14000>; + reg-names = "mmio"; + interrupts = ; + + iommus = <&iommu M4U_PORT_IMG_IPUO>, + <&iommu M4U_PORT_IMG_IPU2O>, + <&iommu M4U_PORT_IMG_IPU3O>, + <&iommu M4U_PORT_IMG_IPUI>, + <&iommu M4U_PORT_IMG_IPU2I>; + + clocks = <&ipu_core0 CLK_IPU_CORE1_AXI>, + <&ipu_core0 CLK_IPU_CORE1_IPU>, + <&ipu_core0 CLK_IPU_CORE1_JTAG>; + + clock-names = "axi", "ipu", "jtag"; + + power-domains = <&scpsys MT8183_POWER_DOMAIN_VPU_CORE1>; + memory-region = <&vpu_ram>; + }; + ipu_core1: syscon@19280000 { compatible = "mediatek,mt8183-ipu_core1", "syscon"; reg = <0 0x19280000 0 0x1000>;