| Message ID | 20200714123920.23711-2-horia.geanta@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hwrng: add support for i.MX6 rngb | expand |
On Tue, 14 Jul 2020 15:39:16 +0300, Horia Geantă wrote: > RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ. > Add corresponding compatible strings. > > Note: > > Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020) > also have a RNGB, however it's part of the CAAM > (Cryptograhic Accelerator and Assurance Module) crypto accelerator. > In this case, RNGB is managed in the caam driver > (drivers/crypto/caam/), since it's tightly related to > the caam "job ring" interface, not to mention CAAM internally relying on > RNGB as source of randomness. > > On the other hand, the i.MX6 SoCs with RNGB have a DCP > (Data Co-Processor) crypto accelerator and this block and RNGB > are independent. > > Signed-off-by: Horia Geantă <horia.geanta@nxp.com> > --- > Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++ > 1 file changed, 3 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/rng/imx-rng.txt index 405c2b00ccb0..659d4efdd664 100644 --- a/Documentation/devicetree/bindings/rng/imx-rng.txt +++ b/Documentation/devicetree/bindings/rng/imx-rng.txt @@ -5,6 +5,9 @@ Required properties: "fsl,imx21-rnga" "fsl,imx31-rnga" (backward compatible with "fsl,imx21-rnga") "fsl,imx25-rngb" + "fsl,imx6sl-rngb" (backward compatible with "fsl,imx25-rngb") + "fsl,imx6sll-rngb" (backward compatible with "fsl,imx25-rngb") + "fsl,imx6ull-rngb" (backward compatible with "fsl,imx25-rngb") "fsl,imx35-rngc" - reg : offset and length of the register set of this block - interrupts : the interrupt number for the RNG block
RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ. Add corresponding compatible strings. Note: Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020) also have a RNGB, however it's part of the CAAM (Cryptograhic Accelerator and Assurance Module) crypto accelerator. In this case, RNGB is managed in the caam driver (drivers/crypto/caam/), since it's tightly related to the caam "job ring" interface, not to mention CAAM internally relying on RNGB as source of randomness. On the other hand, the i.MX6 SoCs with RNGB have a DCP (Data Co-Processor) crypto accelerator and this block and RNGB are independent. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> --- Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++ 1 file changed, 3 insertions(+)