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Wed, 22 Jul 2020 17:51:19 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 22 Jul 2020 18:47:52 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 23 Jul 2020 09:47:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 23 Jul 2020 09:47:51 +0800 From: Miles Chen To: Joerg Roedel , Matthias Brugger , Rob Herring Subject: [PATCH v4] iommu/mediatek: check 4GB mode by reading infracfg Date: Thu, 23 Jul 2020 09:47:50 +0800 Message-ID: <20200723014750.14491-1-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200722_215125_513714_165836D1 X-CRM114-Status: GOOD ( 19.65 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: wsd_upstream@mediatek.com, David Hildenbrand , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Miles Chen , linux-mediatek@lists.infradead.org, Yong Wu , Yingjoe Chen , Mike Rapoport , Christoph Hellwig , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org In previous discussion [1] and [2], we found that it is risky to use max_pfn or totalram_pages to tell if 4GB mode is enabled. Check 4GB mode by reading infracfg register, remove the usage of the un-exported symbol max_pfn. This is a step towards building mtk_iommu as a kernel module. [1] https://lore.kernel.org/lkml/20200603161132.2441-1-miles.chen@mediatek.com/ [2] https://lore.kernel.org/lkml/20200604080120.2628-1-miles.chen@mediatek.com/ [3] https://lore.kernel.org/lkml/20200715205120.GA778876@bogus/ Cc: Mike Rapoport Cc: David Hildenbrand Cc: Yong Wu Cc: Yingjoe Chen Cc: Christoph Hellwig Cc: Rob Herring Cc: Matthias Brugger Signed-off-by: Miles Chen --- Change since v3 - use lore.kernel.org links - move "change since..." after "---" Change since v2: - determine compatible string by m4u_plat - rebase to next-20200720 - add "---" Change since v1: - remove the phandle usage, search for infracfg instead [3] - use infracfg instead of infracfg_regmap - move infracfg definitaions to linux/soc/mediatek/infracfg.h - update enable_4GB only when has_4gb_mode --- drivers/iommu/mtk_iommu.c | 34 +++++++++++++++++++++++---- include/linux/soc/mediatek/infracfg.h | 3 +++ 2 files changed, 32 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 59e5a62a34db..9ec666168822 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -3,7 +3,6 @@ * Copyright (c) 2015-2016 MediaTek Inc. * Author: Yong Wu */ -#include #include #include #include @@ -15,13 +14,16 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include +#include #include #include @@ -640,8 +642,11 @@ static int mtk_iommu_probe(struct platform_device *pdev) struct resource *res; resource_size_t ioaddr; struct component_match *match = NULL; + struct regmap *infracfg; void *protect; int i, larb_nr, ret; + u32 val; + char *p; data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); if (!data) @@ -655,10 +660,29 @@ static int mtk_iommu_probe(struct platform_device *pdev) return -ENOMEM; data->protect_base = ALIGN(virt_to_phys(protect), MTK_PROTECT_PA_ALIGN); - /* Whether the current dram is over 4GB */ - data->enable_4GB = !!(max_pfn > (BIT_ULL(32) >> PAGE_SHIFT)); - if (!MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) - data->enable_4GB = false; + data->enable_4GB = false; + if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) { + switch (data->plat_data->m4u_plat) { + case M4U_MT2712: + p = "mediatek,mt2712-infracfg"; + break; + case M4U_MT8173: + p = "mediatek,mt8173-infracfg"; + break; + default: + p = NULL; + } + + infracfg = syscon_regmap_lookup_by_compatible(p); + + if (IS_ERR(infracfg)) + return PTR_ERR(infracfg); + + ret = regmap_read(infracfg, REG_INFRA_MISC, &val); + if (ret) + return ret; + data->enable_4GB = !!(val & F_DDR_4GB_SUPPORT_EN); + } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); data->base = devm_ioremap_resource(dev, res); diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h index fd25f0148566..233463d789c6 100644 --- a/include/linux/soc/mediatek/infracfg.h +++ b/include/linux/soc/mediatek/infracfg.h @@ -32,6 +32,9 @@ #define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \ BIT(7) | BIT(8)) +#define REG_INFRA_MISC 0xf00 +#define F_DDR_4GB_SUPPORT_EN BIT(13) + int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, bool reg_update); int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask,