From patchwork Mon Aug 17 08:41:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zhukeqian X-Patchwork-Id: 11717447 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 71CEF722 for ; Mon, 17 Aug 2020 09:10:07 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 482F12063A for ; Mon, 17 Aug 2020 09:10:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Y2h8GO2K" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 482F12063A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=FW9hK+RbNoZboZrHBS3PnEd3HX53+vvX+fAi+qcLcIQ=; b=Y2h8GO2Ke2csCcF4rcgdcgfZ7 +WKILQp6JVorLIjBNV4Hz1eRwx6oHKOpg8b6UaxKXdfOT39L1emlqhwaOFPjd5RA1q6O59aqHx9LK NdFW5TVIqjycQ06Fd2sqi1FWsJgxEaMs0xMp0CkAe0CcgqB6e07EZi9NYptkjwW8GLFZyYYzuLtl0 ddP4+P0aRTlLRO7eOD1MapMi/0qHOHXncFLv5rpabGJO8TyyepvcgsDd1MmI749Ct4qgTKr/j0Cy7 S/oNFth/c3kafvngB2vrapZgOgd7X/carH6uKqPz2zbXWuHToT3TR1FHC4u/oUD0eJ2ppVgFMtcPw nnD6j+kRg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k7b9E-00008J-4h; Mon, 17 Aug 2020 09:09:44 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k7ahs-0002CN-1j for linux-arm-kernel@lists.infradead.org; Mon, 17 Aug 2020 08:41:33 +0000 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 63C58374DE456567A6C9; Mon, 17 Aug 2020 16:41:22 +0800 (CST) Received: from DESKTOP-5IS4806.china.huawei.com (10.174.187.22) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.487.0; Mon, 17 Aug 2020 16:41:14 +0800 From: Keqian Zhu To: , , , Subject: [RFC PATCH 4/5] clocksource: arm_arch_timer: Add pvtime LPT initialization Date: Mon, 17 Aug 2020 16:41:09 +0800 Message-ID: <20200817084110.2672-5-zhukeqian1@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20200817084110.2672-1-zhukeqian1@huawei.com> References: <20200817084110.2672-1-zhukeqian1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.22] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200817_044128_387372_308C99A9 X-CRM114-Status: GOOD ( 16.39 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [45.249.212.35 listed in wl.mailspike.net] -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.35 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Suzuki K Poulose , Marc Zyngier , Keqian Zhu , Steven Price , James Morse , Catalin Marinas , wanghaibin.wang@huawei.com, Will Deacon Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Enable paravirtualized time to be used in a KVM guest if the host supports it. This allows the guest to derive a counter which is clocked at a persistent rate even when the guest is migrated. If we discover that the system supports SMCCC v1.1 then we probe to determine whether the hypervisor supports paravirtualized features and finally whether it supports "Live Physical Time" reporting. If so a shared structure is made available to the guest containing coefficients to calculate the derived clock. Signed-off-by: Steven Price Signed-off-by: Keqian Zhu --- drivers/clocksource/arm_arch_timer.c | 69 ++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 6c3e841..eb2e57a 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -26,6 +26,7 @@ #include #include +#include #include #include @@ -84,6 +85,66 @@ static int __init early_evtstrm_cfg(char *buf) } early_param("clocksource.arm_arch_timer.evtstrm", early_evtstrm_cfg); +/* PV-time LPT */ +#ifdef CONFIG_ARM64 +struct pvclock_vm_lpt_time *lpt_info; +EXPORT_SYMBOL_GPL(lpt_info); +DEFINE_STATIC_KEY_FALSE(pvclock_lpt_key_enabled); +EXPORT_SYMBOL_GPL(pvclock_lpt_key_enabled); + +static bool has_pv_lpt_clock(void) +{ + struct arm_smccc_res res; + + if (arm_smccc_1_1_get_conduit() == SMCCC_CONDUIT_NONE) + return false; + + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, + ARM_SMCCC_HV_PV_TIME_FEATURES, &res); + if (res.a0 != SMCCC_RET_SUCCESS) + return false; + + arm_smccc_1_1_invoke(ARM_SMCCC_HV_PV_TIME_FEATURES, + ARM_SMCCC_HV_PV_TIME_LPT, &res); + return res.a0 == SMCCC_RET_SUCCESS; +} + +static int pvclock_lpt_init(void) +{ + struct arm_smccc_res res; + + if (!has_pv_lpt_clock()) + return 0; + + arm_smccc_1_1_invoke(ARM_SMCCC_HV_PV_TIME_LPT, 0, &res); + if (res.a0 == SMCCC_RET_NOT_SUPPORTED) + return 0; + + lpt_info = memremap(res.a0, sizeof(*lpt_info), MEMREMAP_WB); + if (!lpt_info) { + pr_warn("Failed to map pvclock LPT data structure\n"); + return -EFAULT; + } + + if (le32_to_cpu(lpt_info->revision) != 0 || + le32_to_cpu(lpt_info->attributes) != 0) { + pr_warn_once("Unexpected revision or attributes " + "in pvclock LPT data structure\n"); + return -EFAULT; + } + + static_branch_enable(&pvclock_lpt_key_enabled); + pr_info("Using pvclock LPT\n"); + return 0; +} +#else /* CONFIG_ARM64 */ +static int pvclock_lpt_init(void) +{ + return 0; +} +#endif /* CONFIG_ARM64 */ + + /* * Architected system timer support. */ @@ -1285,6 +1346,10 @@ static int __init arch_timer_of_init(struct device_node *np) arch_timer_populate_kvm_info(); + ret = pvclock_lpt_init(); + if (ret) + return ret; + rate = arch_timer_get_cntfrq(); arch_timer_of_configure_rate(rate, np); @@ -1613,6 +1678,10 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) arch_timer_populate_kvm_info(); + ret = pvclock_lpt_init(); + if (ret) + return ret; + /* * When probing via ACPI, we have no mechanism to override the sysreg * CNTFRQ value. This *must* be correct.