diff mbox series

[v2] MAINTAINERS: Add entries for CoreSight and Arm SPE

Message ID 20200820175510.3935932-1-mathieu.poirier@linaro.org (mailing list archive)
State New, archived
Headers show
Series [v2] MAINTAINERS: Add entries for CoreSight and Arm SPE | expand

Commit Message

Mathieu Poirier Aug. 20, 2020, 5:55 p.m. UTC
Add entries for perf tools elements related to the support of Arm CoreSight
and Arm SPE.  Also lump in Arm and Arm64 architecture files to provide
coverage.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
V2:
- Completed fileset for SPE.
- Added Arm and Arm64 architecture files.

 MAINTAINERS | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

John Garry Aug. 21, 2020, 8:55 a.m. UTC | #1
On 20/08/2020 18:55, Mathieu Poirier wrote:
> Add entries for perf tools elements related to the support of Arm CoreSight
> and Arm SPE.  Also lump in Arm and Arm64 architecture files to provide
> coverage.
> 
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

thanks
Acked-by: John Garry <john.garry@huawei.com>

> ---
> V2:
> - Completed fileset for SPE.
> - Added Arm and Arm64 architecture files.
> 
>   MAINTAINERS | 8 +++++++-
>   1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index deaafb617361..e76f7bb014ce 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -13569,12 +13569,18 @@ F:	kernel/events/*
>   F:	tools/lib/perf/
>   F:	tools/perf/
>   
> -PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS
> +PERFORMANCE EVENTS SUBSYSTEM ARM64
>   R:	John Garry <john.garry@huawei.com>
>   R:	Will Deacon <will@kernel.org>
> +R:	Mathieu Poirier <mathieu.poirier@linaro.org>
> +R:	Leo Yan <leo.yan@linaro.org>
>   L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
>   S:	Supported
> +F:	tools/build/feature/test-libopencsd.c
> +F:	tools/perf/arch/arm*/
>   F:	tools/perf/pmu-events/arch/arm64/
> +F:	tools/perf/util/arm-spe*
> +F:	tools/perf/util/cs-etm*
>   
>   PERSONALITY HANDLING
>   M:	Christoph Hellwig <hch@infradead.org>
>
Will Deacon Aug. 21, 2020, 9:05 a.m. UTC | #2
On Thu, Aug 20, 2020 at 11:55:10AM -0600, Mathieu Poirier wrote:
> Add entries for perf tools elements related to the support of Arm CoreSight
> and Arm SPE.  Also lump in Arm and Arm64 architecture files to provide
> coverage.
> 
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> ---
> V2:
> - Completed fileset for SPE.
> - Added Arm and Arm64 architecture files.
> 
>  MAINTAINERS | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index deaafb617361..e76f7bb014ce 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -13569,12 +13569,18 @@ F:	kernel/events/*
>  F:	tools/lib/perf/
>  F:	tools/perf/
>  
> -PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS
> +PERFORMANCE EVENTS SUBSYSTEM ARM64

I'd probably prefer to go with TOOLING instead of SUBSYSTEM, since the
kernel parts are covered by the "ARM PMU PROFILING AND DEBUGGING" entry.

>  R:	John Garry <john.garry@huawei.com>
>  R:	Will Deacon <will@kernel.org>
> +R:	Mathieu Poirier <mathieu.poirier@linaro.org>
> +R:	Leo Yan <leo.yan@linaro.org>
>  L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
>  S:	Supported
> +F:	tools/build/feature/test-libopencsd.c
> +F:	tools/perf/arch/arm*/
>  F:	tools/perf/pmu-events/arch/arm64/
> +F:	tools/perf/util/arm-spe*
> +F:	tools/perf/util/cs-etm*

Either way,

Acked-by: Will Deacon <will@kernel.org>

Thanks,

Will
Arnaldo Carvalho de Melo Aug. 21, 2020, 12:07 p.m. UTC | #3
Em Fri, Aug 21, 2020 at 10:05:31AM +0100, Will Deacon escreveu:
> On Thu, Aug 20, 2020 at 11:55:10AM -0600, Mathieu Poirier wrote:
> > Add entries for perf tools elements related to the support of Arm CoreSight
> > and Arm SPE.  Also lump in Arm and Arm64 architecture files to provide
> > coverage.
> > 
> > Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> > ---
> > V2:
> > - Completed fileset for SPE.
> > - Added Arm and Arm64 architecture files.
> > 
> >  MAINTAINERS | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> > 
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index deaafb617361..e76f7bb014ce 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -13569,12 +13569,18 @@ F:	kernel/events/*
> >  F:	tools/lib/perf/
> >  F:	tools/perf/
> >  
> > -PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS
> > +PERFORMANCE EVENTS SUBSYSTEM ARM64
> 
> I'd probably prefer to go with TOOLING instead of SUBSYSTEM, since the
> kernel parts are covered by the "ARM PMU PROFILING AND DEBUGGING" entry.

Yeah, I think its appropriate to have TOOLING instead of SUBSYSTEM, that
is more commonly used when referring to the kernel.

I'm applying with that change, locally, with your and John's Acked-by,
please holler if that is somehow controversial.

- Arnaldo
 
> >  R:	John Garry <john.garry@huawei.com>
> >  R:	Will Deacon <will@kernel.org>
> > +R:	Mathieu Poirier <mathieu.poirier@linaro.org>
> > +R:	Leo Yan <leo.yan@linaro.org>
> >  L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
> >  S:	Supported
> > +F:	tools/build/feature/test-libopencsd.c
> > +F:	tools/perf/arch/arm*/
> >  F:	tools/perf/pmu-events/arch/arm64/
> > +F:	tools/perf/util/arm-spe*
> > +F:	tools/perf/util/cs-etm*
> 
> Either way,
> 
> Acked-by: Will Deacon <will@kernel.org>
> 
> Thanks,
> 
> Will
diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index deaafb617361..e76f7bb014ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13569,12 +13569,18 @@  F:	kernel/events/*
 F:	tools/lib/perf/
 F:	tools/perf/
 
-PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS
+PERFORMANCE EVENTS SUBSYSTEM ARM64
 R:	John Garry <john.garry@huawei.com>
 R:	Will Deacon <will@kernel.org>
+R:	Mathieu Poirier <mathieu.poirier@linaro.org>
+R:	Leo Yan <leo.yan@linaro.org>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Supported
+F:	tools/build/feature/test-libopencsd.c
+F:	tools/perf/arch/arm*/
 F:	tools/perf/pmu-events/arch/arm64/
+F:	tools/perf/util/arm-spe*
+F:	tools/perf/util/cs-etm*
 
 PERSONALITY HANDLING
 M:	Christoph Hellwig <hch@infradead.org>