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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=HHXt/e3Y/DBXqTOlWL3tdRnya/aQz5KwWbw/CbYxzno=; b=OAk+U8MUU623afMJ19YNT5BO1c5h9VUDxdpkaR0JRATMcVOOHOxchaTT5COMBrY5+b pINWlRyQtD5Lv885AoTjAalfk92VUsu+xpCZi7RZFsVeKUvfsbTZQ52P5QCC5Eorun2j enDMgZjhwDUJn1yjWPJsE+Gd+DTolM3EKVVq7yBYj2BCvvIrkyXwpFqfRsMtZoElyVj9 +QlD6XIbcNjRvAG9hYZY92GCOjn7jk6Es0XcenfFgFNpmx620zQBiuIsWAmFirT211iH UV+kpVi39fmYUvoS+Qvb7R1+6sXpxdgAB5NGFZAAZyEQ7/SEfAYi0c95SKgJyhC/uqFb slkA== X-Gm-Message-State: AOAM531NGWhdoxRGLSFx7wdySr0wqx6N9inVi8w1SN4STHPSmqU4F/0R 1qY5eZJ1NSGZG9f7wiasJJXlu/wJgY1vPduWIyw= X-Google-Smtp-Source: ABdhPJyxl5TMK2SUm9h46ZANnye/+5/WOOuR7KZgzWalZ6y5JkBzVInl5tRoHWGjPdbWuS4/cH+y0cdiqLsxV2zB3f0= X-Received: from samitolvanen1.mtv.corp.google.com ([2620:15c:201:2:f693:9fff:fef4:1b6d]) (user=samitolvanen job=sendgmr) by 2002:a17:902:10f:: with SMTP id 15mr18031937plb.232.1598560575542; Thu, 27 Aug 2020 13:36:15 -0700 (PDT) Date: Thu, 27 Aug 2020 13:36:08 -0700 In-Reply-To: <20200805181920.4013059-1-samitolvanen@google.com> Message-Id: <20200827203608.1225689-1-samitolvanen@google.com> Mime-Version: 1.0 References: <20200805181920.4013059-1-samitolvanen@google.com> X-Mailer: git-send-email 2.28.0.297.g1956fa8f8d-goog Subject: [PATCH v2] arm64: use a common .arch preamble for inline assembly From: Sami Tolvanen To: Catalin Marinas , Will Deacon , Zhenyu Ye X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200827_163619_486088_4FCFAC49 X-CRM114-Status: GOOD ( 16.00 ) X-Spam-Score: -7.7 (-------) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-7.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1049 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -7.5 USER_IN_DEF_DKIM_WL From: address is in the default DKIM white-list -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.0 DKIMWL_WL_MED DKIMwl.org - Medium sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Kees Cook , Marc Zyngier , Nick Desaulniers , linux-kernel@vger.kernel.org, clang-built-linux@googlegroups.com, Sami Tolvanen , Nathan Chancellor , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Commit 7c78f67e9bd9 ("arm64: enable tlbi range instructions") breaks LLVM's integrated assembler, because -Wa,-march is only passed to external assemblers and therefore, the new instructions are not enabled when IAS is used. This change adds a common architecture version preamble, which can be used in inline assembly blocks that contain instructions that require a newer architecture version, and uses it to fix __TLBI_0 and __TLBI_1 with ARM64_TLB_RANGE. Fixes: 7c78f67e9bd9 ("arm64: enable tlbi range instructions") Link: https://github.com/ClangBuiltLinux/linux/issues/1106 Signed-off-by: Sami Tolvanen Reviewed-by: Nathan Chancellor Tested-by: Nathan Chancellor --- Changes in v2: - Switched to a standard preamble for the architecture version. --- arch/arm64/Makefile | 11 ++++++++--- arch/arm64/include/asm/compiler.h | 6 ++++++ arch/arm64/include/asm/tlbflush.h | 6 ++++-- 3 files changed, 18 insertions(+), 5 deletions(-) base-commit: 15bc20c6af4ceee97a1f90b43c0e386643c071b4 diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile index b45f0124cc16..20ab5c9375a5 100644 --- a/arch/arm64/Makefile +++ b/arch/arm64/Makefile @@ -82,8 +82,8 @@ endif # compiler to generate them and consequently to break the single image contract # we pass it only to the assembler. This option is utilized only in case of non # integrated assemblers. -ifneq ($(CONFIG_AS_HAS_ARMV8_4), y) -branch-prot-flags-$(CONFIG_AS_HAS_PAC) += -Wa,-march=armv8.3-a +ifeq ($(CONFIG_AS_HAS_PAC), y) +asm-arch := armv8.3-a endif endif @@ -91,7 +91,12 @@ KBUILD_CFLAGS += $(branch-prot-flags-y) ifeq ($(CONFIG_AS_HAS_ARMV8_4), y) # make sure to pass the newest target architecture to -march. -KBUILD_CFLAGS += -Wa,-march=armv8.4-a +asm-arch := armv8.4-a +endif + +ifdef asm-arch +KBUILD_CFLAGS += -Wa,-march=$(asm-arch) \ + -DARM64_ASM_ARCH='"$(asm-arch)"' endif ifeq ($(CONFIG_SHADOW_CALL_STACK), y) diff --git a/arch/arm64/include/asm/compiler.h b/arch/arm64/include/asm/compiler.h index 51a7ce87cdfe..6fb2e6bcc392 100644 --- a/arch/arm64/include/asm/compiler.h +++ b/arch/arm64/include/asm/compiler.h @@ -2,6 +2,12 @@ #ifndef __ASM_COMPILER_H #define __ASM_COMPILER_H +#ifdef ARM64_ASM_ARCH +#define ARM64_ASM_PREAMBLE ".arch " ARM64_ASM_ARCH "\n" +#else +#define ARM64_ASM_PREAMBLE +#endif + /* * The EL0/EL1 pointer bits used by a pointer authentication code. * This is dependent on TBI0/TBI1 being enabled, or bits 63:56 would also apply. diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index d493174415db..cc3f5a33ff9c 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -28,14 +28,16 @@ * not. The macros handles invoking the asm with or without the * register argument as appropriate. */ -#define __TLBI_0(op, arg) asm ("tlbi " #op "\n" \ +#define __TLBI_0(op, arg) asm (ARM64_ASM_PREAMBLE \ + "tlbi " #op "\n" \ ALTERNATIVE("nop\n nop", \ "dsb ish\n tlbi " #op, \ ARM64_WORKAROUND_REPEAT_TLBI, \ CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \ : : ) -#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0\n" \ +#define __TLBI_1(op, arg) asm (ARM64_ASM_PREAMBLE \ + "tlbi " #op ", %0\n" \ ALTERNATIVE("nop\n nop", \ "dsb ish\n tlbi " #op ", %0", \ ARM64_WORKAROUND_REPEAT_TLBI, \