Message ID | 20200907095246.1651-1-t-kristo@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | ARM: dts: dra7: add second SHA instance | expand |
Hi Tero,
I love your patch! Yet something to improve:
[auto build test ERROR on omap/for-next]
[also build test ERROR on robh/for-next balbi-usb/testing/next v5.9-rc4 next-20200903]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Tero-Kristo/ARM-dts-dra7-add-second-SHA-instance/20200907-175425
base: https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git for-next
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> Error: arch/arm/boot/dts/dra7.dtsi:978.29-30 syntax error
FATAL ERROR: Unable to parse input tree
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
* Tero Kristo <t-kristo@ti.com> [200907 12:52]: > DRA7 SoC has two SHA instances, add the missing second one under the > main dts file. > > Signed-off-by: Tero Kristo <t-kristo@ti.com> > --- > Hi Tony, > > This patch depends on: https://patchwork.kernel.org/patch/11760193/ Applying this into omap-for-v5.11/dt thanks. Tony
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index cca6b123856f..b9cd5bacd606 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -932,7 +932,7 @@ }; }; - sham_target: target-module@4b101000 { + sham1_target: target-module@4b101000 { compatible = "ti,sysc-omap3-sham", "ti,sysc"; reg = <0x4b101100 0x4>, <0x4b101110 0x4>, @@ -951,7 +951,7 @@ #size-cells = <1>; ranges = <0x0 0x4b101000 0x1000>; - sham: sham@0 { + sham1: sham@0 { compatible = "ti,omap5-sham"; reg = <0 0x300>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; @@ -962,6 +962,36 @@ }; }; + sham2_target: target-module@42701000 { + compatible = "ti,sysc-omap3-sham", "ti,sysc"; + reg = <0x42701100 0x4>, + <0x42701110 0x4>, + <0x42701114 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; + ti,syss-mask = <1>; + /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */ + clocks = <&l4sec_clkctrl DRA7_L4SEC_SHAM2_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x42701000 0x1000>; + + sham2: sham@0 { + compatible = "ti,omap5-sham"; + reg = <0 0x300>; + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&edma_xbar 165 0>; + dma-names = "rx"; + clocks = <&l3_iclk_div>; + clock-names = "fck"; + }; + }; + opp_supply_mpu: opp-supply@4a003b20 { compatible = "ti,omap5-opp-supply"; reg = <0x4a003b20 0xc>;
DRA7 SoC has two SHA instances, add the missing second one under the main dts file. Signed-off-by: Tero Kristo <t-kristo@ti.com> --- Hi Tony, This patch depends on: https://patchwork.kernel.org/patch/11760193/ arch/arm/boot/dts/dra7.dtsi | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-)