diff mbox series

[1/2] dt-bindings: pwm: Add bindings for Toshiba Visconti PWM Controller

Message ID 20200917223140.227542-2-nobuhiro1.iwamatsu@toshiba.co.jp (mailing list archive)
State New, archived
Headers show
Series Add Toshiba Visconti SoC PWM support | expand

Commit Message

Nobuhiro Iwamatsu Sept. 17, 2020, 10:31 p.m. UTC
Add bindings for the Toshiba Visconti PWM Controller.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
 .../bindings/pwm/toshiba,pwm-visconti.yaml    | 48 +++++++++++++++++++
 1 file changed, 48 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml

Comments

Rob Herring (Arm) Sept. 23, 2020, 8:37 p.m. UTC | #1
On Fri, Sep 18, 2020 at 07:31:39AM +0900, Nobuhiro Iwamatsu wrote:
> Add bindings for the Toshiba Visconti PWM Controller.
> 
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> ---
>  .../bindings/pwm/toshiba,pwm-visconti.yaml    | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml b/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml
> new file mode 100644
> index 000000000000..9145e9478b41
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: GPL-2.0

Dual license new bindings please.

(GPL-2.0-only OR BSD-2-Clause)

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/toshiba,pwm-visconti.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Toshiba Visconti PWM Controller
> +
> +maintainers:
> +  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - toshiba,pwm-tmpv7708

The normal order is: vendor,soc-block

> +      - const: toshiba,pwm-visconti

Do you expect a lot of chips with the exact same version of the IP? If 
not drop. Future chips can always use toshiba,pwm-tmpv7708 as a 
fallback.

> +
> +  reg:
> +    # base address and length of the registers block for the PWM.

Drop. No need to describe common properties.

> +    maxItems: 1
> +
> +  '#pwm-cells':
> +    # should be 2. See pwm.yaml in this directory for a description of
> +    # the cells format.

Drop.

> +    const: 2
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#pwm-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        pwm: pwm@241c0000 {
> +            compatible = "toshiba,pwm-tmpv7708", "toshiba,pwm-visconti";
> +            reg = <0 0x241c0000 0 0x1000>;
> +            pinctrl-names = "default";
> +            pinctrl-0 = <&pwm_mux>;
> +            #pwm-cells = <2>;
> +        };
> +    };
> -- 
> 2.27.0
>
Nobuhiro Iwamatsu Feb. 12, 2021, 6:44 a.m. UTC | #2
Hi,

Thank for your review.

On Wed, Sep 23, 2020 at 02:37:35PM -0600, Rob Herring wrote:
> On Fri, Sep 18, 2020 at 07:31:39AM +0900, Nobuhiro Iwamatsu wrote:
> > Add bindings for the Toshiba Visconti PWM Controller.
> > 
> > Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> > ---
> >  .../bindings/pwm/toshiba,pwm-visconti.yaml    | 48 +++++++++++++++++++
> >  1 file changed, 48 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml b/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml
> > new file mode 100644
> > index 000000000000..9145e9478b41
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml
> > @@ -0,0 +1,48 @@
> > +# SPDX-License-Identifier: GPL-2.0
> 
> Dual license new bindings please.
> 
> (GPL-2.0-only OR BSD-2-Clause)
> 

OK, I will chnage to dual license.

> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pwm/toshiba,pwm-visconti.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Toshiba Visconti PWM Controller
> > +
> > +maintainers:
> > +  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - toshiba,pwm-tmpv7708
> 
> The normal order is: vendor,soc-block
> 
> > +      - const: toshiba,pwm-visconti
> 
> Do you expect a lot of chips with the exact same version of the IP? If 
> not drop. Future chips can always use toshiba,pwm-tmpv7708 as a 
> fallback.


Currently it still supports only one IP. Therefore, "toshiba, pwm-visconti"
is enough for now. I will drop enum line..

> 
> > +
> > +  reg:
> > +    # base address and length of the registers block for the PWM.
> 
> Drop. No need to describe common properties.
> 

OK, I will drop this properties.

> > +    maxItems: 1
> > +
> > +  '#pwm-cells':
> > +    # should be 2. See pwm.yaml in this directory for a description of
> > +    # the cells format.
> 
> Drop.

OK, I will this comment lines.

> 
> > +    const: 2
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - '#pwm-cells'
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    soc {
> > +        #address-cells = <2>;
> > +        #size-cells = <2>;
> > +
> > +        pwm: pwm@241c0000 {
> > +            compatible = "toshiba,pwm-tmpv7708", "toshiba,pwm-visconti";
> > +            reg = <0 0x241c0000 0 0x1000>;
> > +            pinctrl-names = "default";
> > +            pinctrl-0 = <&pwm_mux>;
> > +            #pwm-cells = <2>;
> > +        };
> > +    };
> > -- 
> > 2.27.0
> > 
> 

Best regards,
  Nobuhiro
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml b/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml
new file mode 100644
index 000000000000..9145e9478b41
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml
@@ -0,0 +1,48 @@ 
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/toshiba,pwm-visconti.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba Visconti PWM Controller
+
+maintainers:
+  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - toshiba,pwm-tmpv7708
+      - const: toshiba,pwm-visconti
+
+  reg:
+    # base address and length of the registers block for the PWM.
+    maxItems: 1
+
+  '#pwm-cells':
+    # should be 2. See pwm.yaml in this directory for a description of
+    # the cells format.
+    const: 2
+
+required:
+  - compatible
+  - reg
+  - '#pwm-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        pwm: pwm@241c0000 {
+            compatible = "toshiba,pwm-tmpv7708", "toshiba,pwm-visconti";
+            reg = <0 0x241c0000 0 0x1000>;
+            pinctrl-names = "default";
+            pinctrl-0 = <&pwm_mux>;
+            #pwm-cells = <2>;
+        };
+    };