From patchwork Fri Sep 25 15:53:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marco Felsch X-Patchwork-Id: 11800147 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 50E1292C for ; Fri, 25 Sep 2020 15:54:11 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2258E21741 for ; Fri, 25 Sep 2020 15:54:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Onu/oiCz" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2258E21741 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=XGPt0UW5CWFUPfjj0IC1Is387XPcbftQTHDod4+EeW4=; b=Onu/oiCzjeP87KWYIhLpQhBfc TDVhR1AhCapM1/o951xpa6NSmfSIayNVqj0HC+yZl+qgS9D9Cvw6F4Gm9AF7EIletqxOfzroWs37o AooTWN15X2BObKqyXDycryOrXmv9v4YUshQZm02UX40G7p0sprPS/wCGEbJKHV94GyiJUoh1DMwZG jIoxZOuynIjm9yNQ1VBKR1x2WM82FBvvU+tyfdITGbwgEB4StyfgciuVRZ9aXyQSaa2ZU1FarP+y6 KoxWj7kEz/k1PIVMmnw+b1yJ9EKFSVBmdwUjNsyx3YpSQVb/dfBPafy1KLTwTvOaiXjOmJWcjFtkZ h8JoukJkw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kLq2r-0003Qd-7X; Fri, 25 Sep 2020 15:54:01 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kLq2b-0003Lz-FV for linux-arm-kernel@lists.infradead.org; Fri, 25 Sep 2020 15:53:47 +0000 Received: from dude02.hi.pengutronix.de ([2001:67c:670:100:1d::28]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kLq2S-0000oS-Ke; Fri, 25 Sep 2020 17:53:36 +0200 Received: from mfe by dude02.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1kLq2Q-0008QI-U5; Fri, 25 Sep 2020 17:53:34 +0200 From: Marco Felsch To: thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, lee.jones@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, Anson.Huang@nxp.com, michal.vokac@ysoft.com, l.majewski@majess.pl Subject: [PATCH v2 3/5] pwm: imx27: reset the PWM if it is not running Date: Fri, 25 Sep 2020 17:53:28 +0200 Message-Id: <20200925155330.32301-4-m.felsch@pengutronix.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200925155330.32301-1-m.felsch@pengutronix.de> References: <20200925155330.32301-1-m.felsch@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::28 X-SA-Exim-Mail-From: mfe@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200925_115345_721547_59992FAE X-CRM114-Status: GOOD ( 15.02 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Trigger a software reset during probe to clear the FIFO and reset the register values to their default. According the datasheet the DBGEN, STOPEN, DOZEN and WAITEN bits should be untouched by the software reset but this is not the case. Signed-off-by: Marco Felsch --- v2: - new patch drivers/pwm/pwm-imx27.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/pwm/pwm-imx27.c b/drivers/pwm/pwm-imx27.c index b761764b8375..3b6bcd8d58b7 100644 --- a/drivers/pwm/pwm-imx27.c +++ b/drivers/pwm/pwm-imx27.c @@ -183,10 +183,8 @@ static void pwm_imx27_get_state(struct pwm_chip *chip, pwm_imx27_clk_disable_unprepare(imx); } -static void pwm_imx27_sw_reset(struct pwm_chip *chip) +static void pwm_imx27_sw_reset(struct pwm_imx27_chip *imx, struct device *dev) { - struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip); - struct device *dev = chip->dev; int wait_count = 0; u32 cr; @@ -266,7 +264,7 @@ static int pwm_imx27_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (imx->enabled) pwm_imx27_wait_fifo_slot(chip, pwm); else - pwm_imx27_sw_reset(chip); + pwm_imx27_sw_reset(imx, chip->dev); writel(duty_cycles, imx->mmio_base + MX3_PWMSAR); writel(period_cycles, imx->mmio_base + MX3_PWMPR); @@ -370,19 +368,23 @@ static int pwm_imx27_probe(struct platform_device *pdev) if (ret) return ret; - mask = MX3_PWMCR_STOPEN | MX3_PWMCR_DOZEN | MX3_PWMCR_WAITEN | - MX3_PWMCR_DBGEN; - pwmcr = MX3_PWMCR_STOPEN | MX3_PWMCR_DOZEN | MX3_PWMCR_WAITEN | - MX3_PWMCR_DBGEN; - pwm_imx27_update_bits(imx->mmio_base + MX3_PWMCR, mask, pwmcr); - /* keep clks on and clk settings unchanged if pwm is running */ pwmcr = readl(imx->mmio_base + MX3_PWMCR); if (!(pwmcr & MX3_PWMCR_EN)) { - mask = MX3_PWMCR_CLKSRC; - pwmcr = FIELD_PREP(MX3_PWMCR_CLKSRC, MX3_PWMCR_CLKSRC_IPG_HIGH); + pwm_imx27_sw_reset(imx, &pdev->dev); + mask = MX3_PWMCR_STOPEN | MX3_PWMCR_DOZEN | MX3_PWMCR_WAITEN | + MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC; + pwmcr = MX3_PWMCR_STOPEN | MX3_PWMCR_DOZEN | MX3_PWMCR_WAITEN | + MX3_PWMCR_DBGEN | + FIELD_PREP(MX3_PWMCR_CLKSRC, MX3_PWMCR_CLKSRC_IPG_HIGH); pwm_imx27_update_bits(imx->mmio_base + MX3_PWMCR, mask, pwmcr); pwm_imx27_clk_disable_unprepare(imx); + } else { + mask = MX3_PWMCR_STOPEN | MX3_PWMCR_DOZEN | MX3_PWMCR_WAITEN | + MX3_PWMCR_DBGEN; + pwmcr = MX3_PWMCR_STOPEN | MX3_PWMCR_DOZEN | MX3_PWMCR_WAITEN | + MX3_PWMCR_DBGEN; + pwm_imx27_update_bits(imx->mmio_base + MX3_PWMCR, mask, pwmcr); } return pwmchip_add(&imx->chip);