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Sat, 26 Sep 2020 06:00:10 -0700 (PDT) From: kholk11@gmail.com To: will@kernel.org Subject: [PATCH 2/8] iommu/arm-smmu-qcom: Add QC SMMUv2 VA Size quirk for SDM660 Date: Sat, 26 Sep 2020 14:59:58 +0200 Message-Id: <20200926130004.13528-3-kholk11@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200926130004.13528-1-kholk11@gmail.com> References: <20200926130004.13528-1-kholk11@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200926_090013_261611_AAE95521 X-CRM114-Status: GOOD ( 18.17 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:441 listed in] [list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [kholk11[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [kholk11[at]gmail.com] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, marijns95@gmail.com, phone-devel@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, joro@8bytes.org, konradybcio@gmail.com, bjorn.andersson@linaro.org, martin.botka1@gmail.com, kholk11@gmail.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: AngeloGioacchino Del Regno Some IOMMUs are getting set-up for Shared Virtual Address, but: 1. They are secured by the Hypervisor, so any configuration change will generate a hyp-fault and crash the system 2. This 39-bits Virtual Address size deviates from the ARM System MMU Architecture specification for SMMUv2, hence it is non-standard. In this case, the only way to keep the IOMMU as the firmware did configure it, is to hardcode a maximum VA size of 39 bits (because of point 1). This gives the need to add implementation details bits for at least some of the SoCs having this kind of configuration, which are at least SDM630, SDM636 and SDM660. These implementation details will be enabled on finding the qcom,sdm660-smmu-v2 compatible. Signed-off-by: AngeloGioacchino Del Regno --- drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 3 ++- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 31 +++++++++++++++++++++- 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c index f4ff124a1967..9d753f8af2cc 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c @@ -216,7 +216,8 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) if (of_device_is_compatible(np, "nvidia,tegra194-smmu")) return nvidia_smmu_impl_init(smmu); - if (of_device_is_compatible(np, "qcom,sdm845-smmu-500") || + if (of_device_is_compatible(np, "qcom,sdm660-smmu-v2") || + of_device_is_compatible(np, "qcom,sdm845-smmu-500") || of_device_is_compatible(np, "qcom,sc7180-smmu-500") || of_device_is_compatible(np, "qcom,sm8150-smmu-500") || of_device_is_compatible(np, "qcom,sm8250-smmu-500")) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 7859fd0db22a..f5bbfe86ef30 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -65,8 +65,33 @@ static const struct arm_smmu_impl qcom_smmu500_impl = { .reset = qcom_smmu500_reset, }; +static int qcom_smmuv2_cfg_probe(struct arm_smmu_device *smmu) +{ + /* + * Some IOMMUs are getting set-up for Shared Virtual Address, but: + * 1. They are secured by the Hypervisor, so any configuration + * change will generate a hyp-fault and crash the system + * 2. This 39-bits Virtual Address size deviates from the ARM + * System MMU Architecture specification for SMMUv2, hence + * it is non-standard. In this case, the only way to keep the + * IOMMU as the firmware did configure it, is to hardcode a + * maximum VA size of 39 bits (because of point 1). + */ + if (smmu->va_size > 39UL) + dev_notice(smmu->dev, + "\tenabling workaround for QCOM SMMUv2 VA size\n"); + smmu->va_size = min(smmu->va_size, 39UL); + + return 0; +} + +static const struct arm_smmu_impl qcom_smmuv2_impl = { + .cfg_probe = qcom_smmuv2_cfg_probe, +}; + struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu) { + const struct device_node *np = smmu->dev->of_node; struct qcom_smmu *qsmmu; qsmmu = devm_kzalloc(smmu->dev, sizeof(*qsmmu), GFP_KERNEL); @@ -75,7 +100,11 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu) qsmmu->smmu = *smmu; - qsmmu->smmu.impl = &qcom_smmu500_impl; + if (of_device_is_compatible(np, "qcom,sdm660-smmu-v2")) { + qsmmu->smmu.impl = &qcom_smmuv2_impl; + } else { + qsmmu->smmu.impl = &qcom_smmu500_impl; + } devm_kfree(smmu->dev, smmu); return &qsmmu->smmu;