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[81.185.163.129]) by smtp.gmail.com with ESMTPSA id j7sm4017406wmc.7.2020.10.15.05.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Oct 2020 05:33:20 -0700 (PDT) From: Fabien Parent To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, dmaengine@vger.kernel.org Subject: [PATCH 2/2] arm64: dts: mediatek: mt8516: add support for APDMA Date: Thu, 15 Oct 2020 14:33:15 +0200 Message-Id: <20201015123315.334919-2-fparent@baylibre.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201015123315.334919-1-fparent@baylibre.com> References: <20201015123315.334919-1-fparent@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201015_083322_413966_3A937D62 X-CRM114-Status: GOOD ( 13.26 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:443 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: matthias.bgg@gmail.com, Fabien Parent , vkoul@kernel.org, robh+dt@kernel.org, sean.wang@mediatek.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add support the APDMA IP on MT8516. APDMA is a DMA controller for UARTs. Signed-off-by: Fabien Parent --- arch/arm64/boot/dts/mediatek/mt8516.dtsi | 27 ++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi index eca7969e15ab..a017664f8eed 100644 --- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi @@ -269,6 +269,27 @@ gic: interrupt-controller@10310000 { (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + apdma: dma-controller@11000480 { + compatible = "mediatek,mt8516-uart-dma", + "mediatek,mt6577-uart-dma"; + reg = <0 0x11000480 0 0x80>, + <0 0x11000500 0 0x80>, + <0 0x11000580 0 0x80>, + <0 0x11000600 0 0x80>, + <0 0x11000980 0 0x80>, + <0 0x11000a00 0 0x80>; + interrupts = , + , + , + , + , + ; + dma-requests = <6>; + clocks = <&topckgen CLK_TOP_APDMA>; + clock-names = "apdma"; + #dma-cells = <1>; + }; + uart0: serial@11005000 { compatible = "mediatek,mt8516-uart", "mediatek,mt6577-uart"; @@ -277,6 +298,8 @@ uart0: serial@11005000 { clocks = <&topckgen CLK_TOP_UART0_SEL>, <&topckgen CLK_TOP_UART0>; clock-names = "baud", "bus"; + dmas = <&apdma 0 + &apdma 1>; status = "disabled"; }; @@ -288,6 +311,8 @@ uart1: serial@11006000 { clocks = <&topckgen CLK_TOP_UART1_SEL>, <&topckgen CLK_TOP_UART1>; clock-names = "baud", "bus"; + dmas = <&apdma 2 + &apdma 3>; status = "disabled"; }; @@ -299,6 +324,8 @@ uart2: serial@11007000 { clocks = <&topckgen CLK_TOP_UART2_SEL>, <&topckgen CLK_TOP_UART2>; clock-names = "baud", "bus"; + dmas = <&apdma 4 + &apdma 5>; status = "disabled"; };