| Message ID | 20201020174253.3757771-5-fparent@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add DRM/DSI support for MT8167 SoC. | expand |
Hi, Fabien: Fabien Parent <fparent@baylibre.com> 於 2020年10月21日 週三 上午1:43寫道： > > On MT8167, DSI seems to work fine only if we start the clk in HS mode. > If we don't start the clk in HS but try to switch later to HS, the > display does not work. > > This commit adds a platform data variable to be used to start the > DSI clk in HS mode at power on. This patch looks like a hack patch. If you cowork with Mediatek, please find out the correct solution or give a reasonable explanation. If you could not get help from Mediatek, I would wait for comment on this patch. Regards, Chun-Kuang. > > Signed-off-by: Fabien Parent <fparent@baylibre.com> > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > index 4a188a942c38..461643c05689 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -175,6 +175,7 @@ struct mtk_dsi_driver_data { > const u32 reg_cmdq_off; > bool has_shadow_ctl; > bool has_size_ctl; > + bool use_hs_on_power_on; > }; > > struct mtk_dsi { > @@ -671,7 +672,7 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) > > mtk_dsi_clk_ulp_mode_leave(dsi); > mtk_dsi_lane0_ulp_mode_leave(dsi); > - mtk_dsi_clk_hs_mode(dsi, 0); > + mtk_dsi_clk_hs_mode(dsi, !!dsi->driver_data->use_hs_on_power_on); > > return 0; > err_disable_engine_clk: > -- > 2.28.0 >
Hi Chun-Kuang, On Wed, Oct 21, 2020 at 7:07 PM Chun-Kuang Hu <chunkuang.hu@kernel.org> wrote: > > Hi, Fabien: > > Fabien Parent <fparent@baylibre.com> 於 2020年10月21日 週三 上午1:43寫道： > > > > On MT8167, DSI seems to work fine only if we start the clk in HS mode. > > If we don't start the clk in HS but try to switch later to HS, the > > display does not work. > > > > This commit adds a platform data variable to be used to start the > > DSI clk in HS mode at power on. > > This patch looks like a hack patch. If you cowork with Mediatek, > please find out the correct solution or give a reasonable explanation. > If you could not get help from Mediatek, I would wait for comment on > this patch. It seems that this workaround is because of a specific display and not because of a specific issue of the MT8167 DSI IP. I will drop this patch in v2. > Regards, > Chun-Kuang. > > > > > Signed-off-by: Fabien Parent <fparent@baylibre.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > > index 4a188a942c38..461643c05689 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > > @@ -175,6 +175,7 @@ struct mtk_dsi_driver_data { > > const u32 reg_cmdq_off; > > bool has_shadow_ctl; > > bool has_size_ctl; > > + bool use_hs_on_power_on; > > }; > > > > struct mtk_dsi { > > @@ -671,7 +672,7 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) > > > > mtk_dsi_clk_ulp_mode_leave(dsi); > > mtk_dsi_lane0_ulp_mode_leave(dsi); > > - mtk_dsi_clk_hs_mode(dsi, 0); > > + mtk_dsi_clk_hs_mode(dsi, !!dsi->driver_data->use_hs_on_power_on); > > > > return 0; > > err_disable_engine_clk: > > -- > > 2.28.0 > >
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 4a188a942c38..461643c05689 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -175,6 +175,7 @@ struct mtk_dsi_driver_data { const u32 reg_cmdq_off; bool has_shadow_ctl; bool has_size_ctl; + bool use_hs_on_power_on; }; struct mtk_dsi { @@ -671,7 +672,7 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) mtk_dsi_clk_ulp_mode_leave(dsi); mtk_dsi_lane0_ulp_mode_leave(dsi); - mtk_dsi_clk_hs_mode(dsi, 0); + mtk_dsi_clk_hs_mode(dsi, !!dsi->driver_data->use_hs_on_power_on); return 0; err_disable_engine_clk:
On MT8167, DSI seems to work fine only if we start the clk in HS mode. If we don't start the clk in HS but try to switch later to HS, the display does not work. This commit adds a platform data variable to be used to start the DSI clk in HS mode at power on. Signed-off-by: Fabien Parent <fparent@baylibre.com> --- drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)