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dmarc=none action=none header.from=nxp.com; Received: from HE1PR0402MB3371.eurprd04.prod.outlook.com (2603:10a6:7:85::27) by HE1PR0402MB3371.eurprd04.prod.outlook.com (2603:10a6:7:85::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.27; Tue, 27 Oct 2020 07:43:14 +0000 Received: from HE1PR0402MB3371.eurprd04.prod.outlook.com ([fe80::f882:7106:de07:1e1e]) by HE1PR0402MB3371.eurprd04.prod.outlook.com ([fe80::f882:7106:de07:1e1e%4]) with mapi id 15.20.3477.028; Tue, 27 Oct 2020 07:43:14 +0000 From: Zhiqiang Hou To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lorenzo.pieralisi@arm.com, robh+dt@kernel.org, bhelgaas@google.com, shawnguo@kernel.org, leoyang.li@nxp.com, gustavo.pimentel@synopsys.com Subject: [PATCHv2 5/7] dt-bindings: pci: layerscape-pci: Update the description of SCFG property Date: Tue, 27 Oct 2020 15:29:59 +0800 Message-Id: <20201027073001.41808-6-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201027073001.41808-1-Zhiqiang.Hou@nxp.com> References: <20201027073001.41808-1-Zhiqiang.Hou@nxp.com> X-Originating-IP: [119.31.174.73] X-ClientProxiedBy: SGAP274CA0002.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::14) To HE1PR0402MB3371.eurprd04.prod.outlook.com (2603:10a6:7:85::27) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.73) by SGAP274CA0002.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3499.18 via Frontend Transport; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: XuUH0p0QHO/y9cjkmoubmAcWJX2emGl1w/IgwDYOdW7u2Se3CjEWepFQ4+kRUHC0F9R2Rs5Hco6ljS8GU8s4cEG5Vw0ztIPpN6uvmqopa3wpH2MHDRdC8Vyt0BHalXFqKSzF2juVuGv1WIq+iCvyH4jBccn6JEIbvmdjr2YDvvkYV18u93mFAjOwumB7WERdqzym7LupVuMcnsOHTZNnl0zA1fK9vY2eyMZrTRNEr294ppFOvaVoN30RWcG9ozVpuUc5t9gW5AJ0kI3BMPXh0Kj5kJq78mdnTN7PED2PKRS8zVNyCPQeFr96JL1nXAndfFKO5iwY6BEDFv36Ubm8iIIdI6IA5pbxL9ZCVqs3G3jG5+LZ5e5pZbtdD/IGbCCFdGcnjn9kMA0Jgc1/waMz8PUBkJq3Hx09sgou6ibgVm4PpIS0I/zP0BM5Gp0yjiRADbE/NRwkoG8J8XWB33BQ06zUiVBUu/A/mdPeacNW+2r9CpB1Mgn/0cNG49ELk8U1lXjmLyfXfnruKM4yVoiXn8OwqaegFHqDLu5b/PQkxvddAl/KuoPbRvPZWT00ncovGNyICrpCOJv3twAqUAroB8qfadJilTk4rAkobLHZdcNXTF+zzS+HYo4zAmm55MuJjm6VhfK3wTNcIalY/Itg/w== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5d3337f5-7036-4408-ff11-08d87a4b7fd4 X-MS-Exchange-CrossTenant-AuthSource: HE1PR0402MB3371.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2020 07:39:56.3263 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: KgbGZb71KK/+MYfxw23FW947II88IW5Xe5a4DIjTeW3eZAAewT3VRvugpJJM1iQqMJiIwPShWfQnJnQzy15L5w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0402MB3371 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201027_034417_290952_199D15B9 X-CRM114-Status: GOOD ( 14.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: minghuan.Lian@nxp.com, Hou Zhiqiang , mingkai.hu@nxp.com, roy.zang@nxp.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Hou Zhiqiang Update the description of the second entry of 'fsl,pcie-scfg' property, as the LS1043A PCIe controller also has some control registers in SCFG block, while it has 3 controllers. Signed-off-by: Hou Zhiqiang Acked-by: Rob Herring --- V2: - No change. Documentation/devicetree/bindings/pci/layerscape-pci.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index 0033c898976e..4228562be505 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -33,7 +33,7 @@ Required properties: "intr": The interrupt that is asserted for controller interrupts - fsl,pcie-scfg: Must include two entries. The first entry must be a link to the SCFG device node - The second entry must be '0' or '1' based on physical PCIe controller index. + The second entry is the physical PCIe controller index starting from '0'. This is used to get SCFG PEXN registers - dma-coherent: Indicates that the hardware IP block can ensure the coherency of the data transferred from/to the IP block. This can avoid the software