Message ID | 20201029070324.16057-3-s.riedmueller@phytec.de (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2,1/6] ARM: dts: imx6ul: segin: Fix stmpe touchscreen subnode name | expand |
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi index d51852857758..7a1e53195785 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi @@ -117,6 +117,7 @@ &i2c1 { som_eeprom: eeprom@50 { compatible = "catalyst,24c32", "atmel,24c32"; + pagesize = <32>; reg = <0x50>; }; diff --git a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi index a3f4e8f6cc9e..a80aa08a37cb 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi @@ -85,6 +85,7 @@ &i2c3 { eeprom@50 { compatible = "st,24c32", "atmel,24c32"; + pagesize = <32>; reg = <0x50>; }; diff --git a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi index ce14ce685d12..11fa3fb5947b 100644 --- a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi +++ b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi @@ -75,6 +75,7 @@ &i2c1 { eeprom@52 { compatible = "catalyst,24c32", "atmel,24c32"; + pagesize = <32>; reg = <0x52>; }; };
Defining the EEPROM pagesize can increase the write speed significantly. Set it to the pagesize stated in the EEPROM's datasheet for phyCORE-i.MX 6UL, phyCORE-i.MX 6 and phyFLEX-i.MX 6. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> --- arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 1 + arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi | 1 + arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 1 + 3 files changed, 3 insertions(+)