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Tue, 03 Nov 2020 07:29:39 -0800 (PST) Received: from dell.default ([91.110.221.242]) by smtp.gmail.com with ESMTPSA id j127sm3491779wma.31.2020.11.03.07.29.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Nov 2020 07:29:38 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 22/25] soc: qcom: kryo-l2-accessors: Fix misnaming of 'val' Date: Tue, 3 Nov 2020 15:28:35 +0000 Message-Id: <20201103152838.1290217-23-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201103152838.1290217-1-lee.jones@linaro.org> References: <20201103152838.1290217-1-lee.jones@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201103_102940_713414_69927E3A X-CRM114-Status: GOOD ( 14.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, Andy Gross , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bjorn Andersson Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/kryo-l2-accessors.c:25: warning: Function parameter or member 'val' not described in 'kryo_l2_set_indirect_reg' drivers/soc/qcom/kryo-l2-accessors.c:25: warning: Excess function parameter 'value' description in 'kryo_l2_set_indirect_reg' Cc: Andy Gross Cc: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Lee Jones --- drivers/soc/qcom/kryo-l2-accessors.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/qcom/kryo-l2-accessors.c b/drivers/soc/qcom/kryo-l2-accessors.c index c20cb92077c03..7886af4fd7267 100644 --- a/drivers/soc/qcom/kryo-l2-accessors.c +++ b/drivers/soc/qcom/kryo-l2-accessors.c @@ -16,7 +16,7 @@ static DEFINE_RAW_SPINLOCK(l2_access_lock); /** * kryo_l2_set_indirect_reg() - write value to an L2 register * @reg: Address of L2 register. - * @value: Value to be written to register. + * @val: Value to be written to register. * * Use architecturally required barriers for ordering between system register * accesses, and system registers with respect to device memory