| Message ID | 20201105085458.21121-2-zajec5@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | None | expand |
On 11/5/2020 12:54 AM, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > They don't descibe hardware fully yet but it's enough to boot a system. > > Some missing blocks: > 1. PMC (Power Management Controller?) > 2. Ethernet > 3. Crypto > 4. Thermal > > Asus DTS is missing defining full NAND partitions layout and buttons. > > Further changes will fill those gaps as soon as required bindings will > be found / tested / added. > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> We would need a board/SoC binding document under Documentation/devicetree/bindings/arm/bcm/ which describes the 4908 SoC and its possible boards at least. [snip] h > + > +&nandcs { > + nand-ecc-strength = <4>; > + nand-ecc-step-size = <512>; > + nand-on-flash-bbt; > + brcm,nand-has-wp; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "cferom"; > + reg = <0x000000000000 0x000000100000>; You can probably trim the leading zeroes. > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi > new file mode 100644 > index 000000000000..3bbefc86b978 > --- /dev/null > +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi > @@ -0,0 +1,188 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/dts-v1/; > + > +/ { > + interrupt-parent = <&gic>; > + > + #address-cells = <2>; > + #size-cells = <2>; > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + bootargs = "earlycon=bcm63xx_uart,0xff800640"; We talked about it before, but the earlycon should be dropped from the .dtsi file, it does not really belong there. The rest looks good to me!
On 11.11.2020 02:04, Florian Fainelli wrote: >> diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi >> new file mode 100644 >> index 000000000000..3bbefc86b978 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi >> @@ -0,0 +1,188 @@ >> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT >> + >> +#include <dt-bindings/interrupt-controller/irq.h> >> +#include <dt-bindings/interrupt-controller/arm-gic.h> >> + >> +/dts-v1/; >> + >> +/ { >> + interrupt-parent = <&gic>; >> + >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + aliases { >> + serial0 = &uart0; >> + }; >> + >> + chosen { >> + bootargs = "earlycon=bcm63xx_uart,0xff800640"; > > We talked about it before, but the earlycon should be dropped from the > .dtsi file, it does not really belong there. I asked the following question that you probably missed, could you check it, please? On Wed, 4 Nov 2020 at 09:02, Rafał Miłecki <zajec5@gmail.com> wrote: > Can you explain why, is that some kernel rule I missed? That's extremely helpful for debugging. ^^
On 11/10/2020 9:59 PM, Rafał Miłecki wrote: > On 11.11.2020 02:04, Florian Fainelli wrote: >>> diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi >>> b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi >>> new file mode 100644 >>> index 000000000000..3bbefc86b978 >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi >>> @@ -0,0 +1,188 @@ >>> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT >>> + >>> +#include <dt-bindings/interrupt-controller/irq.h> >>> +#include <dt-bindings/interrupt-controller/arm-gic.h> >>> + >>> +/dts-v1/; >>> + >>> +/ { >>> + interrupt-parent = <&gic>; >>> + >>> + #address-cells = <2>; >>> + #size-cells = <2>; >>> + >>> + aliases { >>> + serial0 = &uart0; >>> + }; >>> + >>> + chosen { >>> + bootargs = "earlycon=bcm63xx_uart,0xff800640"; >> >> We talked about it before, but the earlycon should be dropped from the >> .dtsi file, it does not really belong there. > > I asked the following question that you probably missed, could you check > it, please? > > On Wed, 4 Nov 2020 at 09:02, Rafał Miłecki <zajec5@gmail.com> wrote: >> Can you explain why, is that some kernel rule I missed? That's > extremely helpful for debugging. It's useful for debugging but because it is meant for debugging it does not really belong in a .dtsi which gets included by a board level .dts file and I would argue that it does not belong in a board level .dts either. This is something that you can and should keep locally while debugging and remove for "production". That is not a rule that is written somewhere, and there are certainly cases of .dts files in the kernel containing "earlycon" for better or for worse.
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile index cb7de8d99223..998e240aa698 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -5,5 +5,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb \ bcm2837-rpi-3-b-plus.dtb \ bcm2837-rpi-cm3-io3.dtb +subdir-y += bcm4908 subdir-y += northstar2 subdir-y += stingray diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile new file mode 100644 index 000000000000..ef26c23603ce --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts new file mode 100644 index 000000000000..a9d10e028864 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +#include "bcm4908.dtsi" + +/ { + compatible = "asus,gt-ac5300", "brcm,bcm4908"; + model = "Asus GT-AC5300"; + + memory@0 { + device_type = "memory"; + reg = <0x00 0x00 0x00 0x40000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + poll-interval = <100>; + + wifi { + label = "WiFi"; + linux,code = <KEY_RFKILL>; + gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "WPS"; + linux,code = <KEY_WPS_BUTTON>; + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + }; + + restart { + label = "Reset"; + linux,code = <KEY_RESTART>; + gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; + }; + + brightness { + label = "LEDs"; + linux,code = <KEY_BRIGHTNESS_ZERO>; + gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + brcm,nand-has-wp; + + #address-cells = <1>; + #size-cells = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "cferom"; + reg = <0x000000000000 0x000000100000>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi new file mode 100644 index 000000000000..3bbefc86b978 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/dts-v1/; + +/ { + interrupt-parent = <&gic>; + + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart0; + }; + + chosen { + bootargs = "earlycon=bcm63xx_uart,0xff800640"; + stdout-path = "serial0:115200n8"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "brcm,brahma-b53"; + reg = <0x0>; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "brcm,brahma-b53"; + reg = <0x1>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0xfff8>; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "brcm,brahma-b53"; + reg = <0x2>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0xfff8>; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "brcm,brahma-b53"; + reg = <0x3>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0xfff8>; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00 0x00 0x81000000 0x4000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + clocks { + periph_clk: periph_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + clock-output-names = "periph"; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00 0x00 0x80000000 0x10000>; + + ehci@c300 { + compatible = "generic-ehci"; + reg = <0xc300 0x100>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + ohci@c400 { + compatible = "generic-ohci"; + reg = <0xc400 0x100>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + xhci@d000 { + compatible = "generic-xhci"; + reg = <0xd000 0x8c8>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + }; + + ubus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00 0x00 0xff800000 0x3000>; + + timer: timer@400 { + compatible = "brcm,bcm6328-timer", "syscon"; + reg = <0x400 0x3c>; + }; + + gpio0: gpio-controller@500 { + compatible = "brcm,bcm6345-gpio"; + reg-names = "dirout", "dat"; + reg = <0x500 0x28>, <0x528 0x28>; + + #gpio-cells = <2>; + gpio-controller; + }; + + uart0: serial@640 { + compatible = "brcm,bcm6345-uart"; + reg = <0x640 0x18>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&periph_clk>; + clock-names = "periph"; + status = "okay"; + }; + + nand@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "nand"; + status = "okay"; + + nandcs: nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + + reboot { + compatible = "syscon-reboot"; + regmap = <&timer>; + offset = <0x34>; + mask = <1>; + }; + }; +};