| Message ID | 20201109113233.9012-12-dbrazdil@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Opt-in always-on nVHE hypervisor | expand |
On 2020-11-09 11:32, David Brazdil wrote: > Add handler of host SMCs in KVM nVHE trap handler. Forward all SMCs to > EL3 and propagate the result back to EL1. This is done in preparation > for validating host SMCs in KVM nVHE protected mode. > > Signed-off-by: David Brazdil <dbrazdil@google.com> > --- > arch/arm64/kvm/hyp/nvhe/hyp-main.c | 35 ++++++++++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c > b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > index 19332c20fcde..8661bc7deaa9 100644 > --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > @@ -106,6 +106,38 @@ static void handle_host_hcall(struct > kvm_cpu_context *host_ctxt) > host_ctxt->regs.regs[1] = ret; > } > > +static void skip_host_instruction(void) > +{ > + write_sysreg_el2(read_sysreg_el2(SYS_ELR) + 4, SYS_ELR); > +} > + > +static void forward_host_smc(struct kvm_cpu_context *host_ctxt) > +{ > + struct arm_smccc_res res; > + > + arm_smccc_1_1_smc(host_ctxt->regs.regs[0], host_ctxt->regs.regs[1], > + host_ctxt->regs.regs[2], host_ctxt->regs.regs[3], > + host_ctxt->regs.regs[4], host_ctxt->regs.regs[5], > + host_ctxt->regs.regs[6], host_ctxt->regs.regs[7], > + &res); How do you make sure that EL3 actually supports SMCCC 1.1? If that's not the case, don't we risk additional registers being corrupted? What of SMCCC 1.2 calls that extend arguments to up to x17? > + host_ctxt->regs.regs[0] = res.a0; > + host_ctxt->regs.regs[1] = res.a1; > + host_ctxt->regs.regs[2] = res.a2; > + host_ctxt->regs.regs[3] = res.a3; > +} > + > +static void handle_host_smc(struct kvm_cpu_context *host_ctxt) > +{ > + /* > + * Unlike HVC, the return address of an SMC is the instruction's PC. > + * Move the return address past the instruction. > + */ > + skip_host_instruction(); > + > + /* Forward SMC not handled in EL2 to EL3. */ > + forward_host_smc(host_ctxt); nit: In general, we update the PC *after* emulating the instruction that trapped. Not a big deal, but it makes it easier to reason across the code base. > +} > + > void handle_trap(struct kvm_cpu_context *host_ctxt) > { > u64 esr = read_sysreg_el2(SYS_ESR); > @@ -114,6 +146,9 @@ void handle_trap(struct kvm_cpu_context *host_ctxt) > case ESR_ELx_EC_HVC64: > handle_host_hcall(host_ctxt); > break; > + case ESR_ELx_EC_SMC64: > + handle_host_smc(host_ctxt); > + break; > default: > hyp_panic(); > } Thanks, M.
diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c index 19332c20fcde..8661bc7deaa9 100644 --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c @@ -106,6 +106,38 @@ static void handle_host_hcall(struct kvm_cpu_context *host_ctxt) host_ctxt->regs.regs[1] = ret; } +static void skip_host_instruction(void) +{ + write_sysreg_el2(read_sysreg_el2(SYS_ELR) + 4, SYS_ELR); +} + +static void forward_host_smc(struct kvm_cpu_context *host_ctxt) +{ + struct arm_smccc_res res; + + arm_smccc_1_1_smc(host_ctxt->regs.regs[0], host_ctxt->regs.regs[1], + host_ctxt->regs.regs[2], host_ctxt->regs.regs[3], + host_ctxt->regs.regs[4], host_ctxt->regs.regs[5], + host_ctxt->regs.regs[6], host_ctxt->regs.regs[7], + &res); + host_ctxt->regs.regs[0] = res.a0; + host_ctxt->regs.regs[1] = res.a1; + host_ctxt->regs.regs[2] = res.a2; + host_ctxt->regs.regs[3] = res.a3; +} + +static void handle_host_smc(struct kvm_cpu_context *host_ctxt) +{ + /* + * Unlike HVC, the return address of an SMC is the instruction's PC. + * Move the return address past the instruction. + */ + skip_host_instruction(); + + /* Forward SMC not handled in EL2 to EL3. */ + forward_host_smc(host_ctxt); +} + void handle_trap(struct kvm_cpu_context *host_ctxt) { u64 esr = read_sysreg_el2(SYS_ESR); @@ -114,6 +146,9 @@ void handle_trap(struct kvm_cpu_context *host_ctxt) case ESR_ELx_EC_HVC64: handle_host_hcall(host_ctxt); break; + case ESR_ELx_EC_SMC64: + handle_host_smc(host_ctxt); + break; default: hyp_panic(); }
Add handler of host SMCs in KVM nVHE trap handler. Forward all SMCs to EL3 and propagate the result back to EL1. This is done in preparation for validating host SMCs in KVM nVHE protected mode. Signed-off-by: David Brazdil <dbrazdil@google.com> --- arch/arm64/kvm/hyp/nvhe/hyp-main.c | 35 ++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+)