diff mbox series

ARM: dts: BCM5301X: Move CRU devices to the CRU node

Message ID 20201111145538.14893-1-zajec5@gmail.com (mailing list archive)
State New, archived
Headers show
Series ARM: dts: BCM5301X: Move CRU devices to the CRU node | expand

Commit Message

Rafał Miłecki Nov. 11, 2020, 2:55 p.m. UTC
From: Rafał Miłecki <rafal@milecki.pl>

Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or
"Central Resource Unit").

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
 arch/arm/boot/dts/bcm5301x.dtsi | 51 +++++++++++++++++----------------
 1 file changed, 26 insertions(+), 25 deletions(-)

Comments

Florian Fainelli Nov. 12, 2020, 4:13 a.m. UTC | #1
On 11/11/2020 6:55 AM, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or
> "Central Resource Unit").
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>

Applied to devicetree/next, thanks!
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 3e55ff4fb550..8b8699f9ea4f 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -428,6 +428,26 @@  cru@100 {
 			#address-cells = <1>;
 			#size-cells = <1>;
 
+			lcpll0: lcpll0@100 {
+				#clock-cells = <1>;
+				compatible = "brcm,nsp-lcpll0";
+				reg = <0x100 0x14>;
+				clocks = <&osc>;
+				clock-output-names = "lcpll0", "pcie_phy",
+						     "sdio", "ddr_phy";
+			};
+
+			genpll: genpll@140 {
+				#clock-cells = <1>;
+				compatible = "brcm,nsp-genpll";
+				reg = <0x140 0x24>;
+				clocks = <&osc>;
+				clock-output-names = "genpll", "phy",
+						     "ethernetclk",
+						     "usbclk", "iprocfast",
+						     "sata1", "sata2";
+			};
+
 			pin-controller@1c0 {
 				compatible = "brcm,bcm4708-pinmux";
 				reg = <0x1c0 0x24>;
@@ -454,32 +474,13 @@  pinmux_uart1: uart1 {
 					function = "uart1";
 				};
 			};
-		};
-	};
-
-	lcpll0: lcpll0@1800c100 {
-		#clock-cells = <1>;
-		compatible = "brcm,nsp-lcpll0";
-		reg = <0x1800c100 0x14>;
-		clocks = <&osc>;
-		clock-output-names = "lcpll0", "pcie_phy", "sdio",
-				     "ddr_phy";
-	};
 
-	genpll: genpll@1800c140 {
-		#clock-cells = <1>;
-		compatible = "brcm,nsp-genpll";
-		reg = <0x1800c140 0x24>;
-		clocks = <&osc>;
-		clock-output-names = "genpll", "phy", "ethernetclk",
-				     "usbclk", "iprocfast", "sata1",
-				     "sata2";
-	};
-
-	thermal: thermal@1800c2c0 {
-		compatible = "brcm,ns-thermal";
-		reg = <0x1800c2c0 0x10>;
-		#thermal-sensor-cells = <0>;
+			thermal: thermal@2c0 {
+				compatible = "brcm,ns-thermal";
+				reg = <0x2c0 0x10>;
+				#thermal-sensor-cells = <0>;
+			};
+		};
 	};
 
 	srab: srab@18007000 {