From patchwork Thu Nov 12 08:40:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 11898715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.8 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E49AC388F9 for ; Wed, 11 Nov 2020 23:43:05 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AD99D2072E for ; Wed, 11 Nov 2020 23:43:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="ONRnjUwk" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AD99D2072E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=toshiba.co.jp Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bMK0dnFwJ1eZ/YjH+UuuQxXSI/u5mIHZFiKDEWSBgxE=; b=ONRnjUwkXf5w/UCAvQKOu3EdB miQ4718M3c1C0TCzqi7hksEQLWtXDkZWxh7w5LPH/3pnKdju1pwzzRIj6paYReFQKMrFKdaUwTSUA srXGNKykJzPOgLCvG4oEypbNt70d+KyYyuSb1A8Mom5naf+V7INRfDAI//ZkzMIH1At8G2VstXhBW GeHTkB0VxiCb4sWxZzyGzKUa2rShqs3UpjTZ2s948GmJQcCQuLQ7Ir8wWZU5V1Gk/7+eNUjqcR4q2 8iLICBKCt9Cqz7eNjjz/HTS8LPXM0DBaEwreG+QSksyM6p47nQjAct56wsNpS/aHfeoeRM/2Ww6H1 qxMlBujSg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kczl8-0007BJ-4o; Wed, 11 Nov 2020 23:42:38 +0000 Received: from mo-csw1116.securemx.jp ([210.130.202.158] helo=mo-csw.securemx.jp) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kczko-00077W-Fi for linux-arm-kernel@lists.infradead.org; Wed, 11 Nov 2020 23:42:19 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1116) id 0ABNgBtO004573; Thu, 12 Nov 2020 08:42:11 +0900 X-Iguazu-Qid: 2wHHV20KPmXSE6z9Zg X-Iguazu-QSIG: v=2; s=0; t=1605138131; q=2wHHV20KPmXSE6z9Zg; m=4N+CvX23mKlsNGvGLKo/FPQu0W0ccP8J6JucCZN54lU= Received: from imx12.toshiba.co.jp (imx12.toshiba.co.jp [61.202.160.132]) by relay.securemx.jp (mx-mr1112) id 0ABNgAb1007555; Thu, 12 Nov 2020 08:42:10 +0900 Received: from enc02.toshiba.co.jp ([61.202.160.51]) by imx12.toshiba.co.jp with ESMTP id 0ABNgA3W002687; Thu, 12 Nov 2020 08:42:10 +0900 (JST) Received: from hop101.toshiba.co.jp ([133.199.85.107]) by enc02.toshiba.co.jp with ESMTP id 0ABNg9MW008022; Thu, 12 Nov 2020 08:42:10 +0900 From: Nobuhiro Iwamatsu To: Rob Herring , Linus Walleij Subject: [PATCH v2 1/4] dt-bindings: gpio: Add bindings for Toshiba Visconti GPIO Controller Date: Thu, 12 Nov 2020 17:40:54 +0900 X-TSB-HOP: ON Message-Id: <20201112084057.1399983-2-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201112084057.1399983-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20201112084057.1399983-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201111_184219_065478_1C808203 X-CRM114-Status: GOOD ( 11.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, punit1.agrawal@toshiba.co.jp, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Nobuhiro Iwamatsu , yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add bindings for the Toshiba Visconti GPIO Controller. Signed-off-by: Nobuhiro Iwamatsu --- .../bindings/gpio/toshiba,gpio-visconti.yaml | 85 +++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml diff --git a/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml b/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml new file mode 100644 index 000000000000..735b5c811c57 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/toshiba,gpio-visconti.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti ARM SoCs GPIO controller + +maintainers: + - Nobuhiro Iwamatsu + +properties: + compatible: + items: + - const: toshiba,gpio-tmpv7708 + + reg: + maxItems: 1 + + "#gpio-cells": + const: 2 + + gpio-ranges: true + + gpio-controller: true + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + description: + interrupt mapping one per GPIO. + minItems: 32 + maxItems: 32 + +required: + - compatible + - reg + - "#gpio-cells" + - gpio-ranges + - gpio-controller + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + gpio: gpio@28020000 { + compatible = "toshiba,gpio-tmpv7708"; + reg = <0 0x28020000 0 0x1000>; + #gpio-cells = <0x2>; + gpio-ranges = <&pmux 0 0 32>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; +...