| Message ID | 20201125103909.16548-1-laurentiu.palcu@oss.nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: imx8mq: add DCSS node | expand |
On Mi, 2020-11-25 at 12:39 +0200, Laurentiu Palcu wrote: > This patch adds the node for iMX8MQ Display Controller Subsystem. > > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > Hi, > > This is, actually, a resend of the patch because we decided to drop it > from the main DCSS patchset until the driver gets merged. > > Now that the driver is in mainline, we can finally add DCSS node in DTS. > > Thanks, > laurentiu > > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index 5e0e7d0f1bc4..5a617f9ed8b5 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -1103,6 +1103,29 @@ > #size-cells = <1>; > ranges = <0x32c00000 0x32c00000 0x400000>; > > + dcss: display-controller@32e00000 { > + compatible = "nxp,imx8mq-dcss"; > + reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; > + interrupts = <6>, <8>, <9>; > + interrupt-names = "ctxld", "ctxld_kick", "vblank"; > + interrupt-parent = <&irqsteer>; > + clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, > + <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, > + <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, > + <&clk IMX8MQ_VIDEO2_PLL_OUT>, > + <&clk IMX8MQ_CLK_DISP_DTRC>; > + clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; > + assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, > + <&clk IMX8MQ_CLK_DISP_RTRM>, > + <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>; > + assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, > + <&clk IMX8MQ_SYS1_PLL_800M>, > + <&clk IMX8MQ_CLK_27M>; > + assigned-clock-rates = <800000000>, > + <400000000>; > + status = "disabled"; > + }; > + > irqsteer: interrupt-controller@32e2d000 { > compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer"; > reg = <0x32e2d000 0x1000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 5e0e7d0f1bc4..5a617f9ed8b5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1103,6 +1103,29 @@ #size-cells = <1>; ranges = <0x32c00000 0x32c00000 0x400000>; + dcss: display-controller@32e00000 { + compatible = "nxp,imx8mq-dcss"; + reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; + interrupts = <6>, <8>, <9>; + interrupt-names = "ctxld", "ctxld_kick", "vblank"; + interrupt-parent = <&irqsteer>; + clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, + <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, + <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, + <&clk IMX8MQ_VIDEO2_PLL_OUT>, + <&clk IMX8MQ_CLK_DISP_DTRC>; + clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; + assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, + <&clk IMX8MQ_CLK_DISP_RTRM>, + <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>; + assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, + <&clk IMX8MQ_SYS1_PLL_800M>, + <&clk IMX8MQ_CLK_27M>; + assigned-clock-rates = <800000000>, + <400000000>; + status = "disabled"; + }; + irqsteer: interrupt-controller@32e2d000 { compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer"; reg = <0x32e2d000 0x1000>;
This patch adds the node for iMX8MQ Display Controller Subsystem. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> --- Hi, This is, actually, a resend of the patch because we decided to drop it from the main DCSS patchset until the driver gets merged. Now that the driver is in mainline, we can finally add DCSS node in DTS. Thanks, laurentiu arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)