From patchwork Mon Nov 30 10:00:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yifeng Zhao X-Patchwork-Id: 11940047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D55FDC71156 for ; Mon, 30 Nov 2020 10:03:07 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 411D020825 for ; Mon, 30 Nov 2020 10:03:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="0fG7UQpq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 411D020825 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=rock-chips.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=SoG7GUtGAIWiJDKc/Frw8zFMVdV2rgFzZYIE9UzvNcA=; b=0fG7UQpqjbNHhduU6Jd+zlykMn zIZ6Lj19pf8cUs9ids0/ZO6/ssNMJWByATi9Ebq9EY4OHbGFJsLaaCmvZmjER9CECZjLZyDORoWSZ 3vLyuwiKVFwxVwItLEr7Zt+7DqVtu4YVAdSGQpVout8zpN4Peh8PqWlZBm+Khxd/Qvdxu0MV4Qv87 +Ti5/A1oqcKVnzouAGrYGrA77ZemXxSbkJ8tj7oWImlFOvoasOVra0Oa9vkSikLGO8z2iXeRpilhm OuPaCuTtfuF0VsjPH//7nNfs2j5ATKNhycswtQMTfC2XPCnu69XRQ27ym3Lu0FoIvnkUSvs8MQtPI a6NBzIlA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kjfzO-0005Ix-9f; Mon, 30 Nov 2020 10:00:58 +0000 Received: from lucky1.263xmail.com ([211.157.147.131]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kjfzJ-0005H4-Fd; Mon, 30 Nov 2020 10:00:56 +0000 Received: from localhost (unknown [192.168.167.32]) by lucky1.263xmail.com (Postfix) with ESMTP id 5430BB6AE1; Mon, 30 Nov 2020 18:00:47 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P26666T140451562632960S1606730439337010_; Mon, 30 Nov 2020 18:00:46 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <9accf8de2dfb7349ef69b66aa02dbbf3> X-RL-SENDER: yifeng.zhao@rock-chips.com X-SENDER: zyf@rock-chips.com X-LOGIN-NAME: yifeng.zhao@rock-chips.com X-FST-TO: miquel.raynal@bootlin.com X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: Yifeng Zhao To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh+dt@kernel.org Subject: [PATCH v15 1/8] dt-bindings: mtd: Describe Rockchip RK3xxx NAND flash controller Date: Mon, 30 Nov 2020 18:00:28 +0800 Message-Id: <20201130100031.22083-2-yifeng.zhao@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201130100031.22083-1-yifeng.zhao@rock-chips.com> References: <20201130100031.22083-1-yifeng.zhao@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201130_050054_047568_C978AC1F X-CRM114-Status: GOOD ( 16.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, heiko@sntech.de, Yifeng Zhao , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Documentation support for Rockchip RK3xxx NAND flash controllers Reviewed-by: Rob Herring Signed-off-by: Yifeng Zhao --- Changes in v15: None Changes in v14: None Changes in v13: None Changes in v12: - Fix some warnings while make dt_binding_check - Drop a allOf defined Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - Fix a error while make dt_binding_check Changes in v7: - Fix some wrong define Changes in v6: - Fix some wrong define - Modified the definition of compatible Changes in v5: - Fix some wrong define. - Add boot-medium define. - Remove some compatible define. Changes in v4: - The compatible define with rkxx_nfc. - Add assigned-clocks. - Fix some wrong defineChanges in. Changes in v3: - Change the title for the dt-bindings. Changes in v2: None .../mtd/rockchip,nand-controller.yaml | 161 ++++++++++++++++++ 1 file changed, 161 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml diff --git a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml new file mode 100644 index 000000000000..0922536b1811 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml @@ -0,0 +1,161 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip SoCs NAND FLASH Controller (NFC) + +allOf: + - $ref: "nand-controller.yaml#" + +maintainers: + - Heiko Stuebner + +properties: + compatible: + oneOf: + - const: rockchip,px30-nfc + - const: rockchip,rk2928-nfc + - const: rockchip,rv1108-nfc + - items: + - const: rockchip,rk3036-nfc + - const: rockchip,rk2928-nfc + - items: + - const: rockchip,rk3308-nfc + - const: rockchip,rv1108-nfc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: Bus Clock + - description: Module Clock + + clock-names: + minItems: 1 + items: + - const: ahb + - const: nfc + + assigned-clocks: + maxItems: 1 + + assigned-clock-rates: + maxItems: 1 + + power-domains: + maxItems: 1 + +patternProperties: + "^nand@[0-7]$": + type: object + properties: + reg: + minimum: 0 + maximum: 7 + + nand-ecc-mode: + const: hw + + nand-ecc-step-size: + const: 1024 + + nand-ecc-strength: + enum: [16, 24, 40, 60, 70] + description: | + The ECC configurations that can be supported are as follows. + NFC v600 ECC 16, 24, 40, 60 + RK2928, RK3066, RK3188 + + NFC v622 ECC 16, 24, 40, 60 + RK3036, RK3128 + + NFC v800 ECC 16 + RK3308, RV1108 + + NFC v900 ECC 16, 40, 60, 70 + RK3326, PX30 + + nand-bus-width: + const: 8 + + rockchip,boot-blks: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 2 + default: 16 + description: + The NFC driver need this information to select ECC + algorithms supported by the boot ROM. + Only used in combination with 'nand-is-boot-medium'. + + rockchip,boot-ecc-strength: + enum: [16, 24, 40, 60, 70] + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + description: | + If specified it indicates that a different BCH/ECC setting is + supported by the boot ROM. + NFC v600 ECC 16, 24 + RK2928, RK3066, RK3188 + + NFC v622 ECC 16, 24, 40, 60 + RK3036, RK3128 + + NFC v800 ECC 16 + RK3308, RV1108 + + NFC v900 ECC 16, 70 + RK3326, PX30 + + Only used in combination with 'nand-is-boot-medium'. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + nfc: nand-controller@ff4b0000 { + compatible = "rockchip,rk3308-nfc", + "rockchip,rv1108-nfc"; + reg = <0xff4b0000 0x4000>; + interrupts = ; + clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>; + clock-names = "ahb", "nfc"; + assigned-clocks = <&clks SCLK_NANDC>; + assigned-clock-rates = <150000000>; + + pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0 + &flash_rdn &flash_rdy &flash_wrn>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; + label = "rk-nand"; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-step-size = <1024>; + nand-ecc-strength = <16>; + nand-is-boot-medium; + rockchip,boot-blks = <8>; + rockchip,boot-ecc-strength = <16>; + }; + }; + +...