diff mbox series

arm64: mte: remove an ISB on kernel exit

Message ID 20201203073458.2675400-1-pcc@google.com (mailing list archive)
State New, archived
Headers show
Series arm64: mte: remove an ISB on kernel exit | expand

Commit Message

Peter Collingbourne Dec. 3, 2020, 7:34 a.m. UTC
This ISB is unnecessary because we will soon do an ERET.

Signed-off-by: Peter Collingbourne <pcc@google.com>
Link: https://linux-review.googlesource.com/id/I69f1ee6bb09b1372dd744a0e01cedaf090c8d448
---
 arch/arm64/kernel/entry.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Catalin Marinas Dec. 3, 2020, 2:41 p.m. UTC | #1
On Wed, Dec 02, 2020 at 11:34:58PM -0800, Peter Collingbourne wrote:
> This ISB is unnecessary because we will soon do an ERET.
> 
> Signed-off-by: Peter Collingbourne <pcc@google.com>
> Link: https://linux-review.googlesource.com/id/I69f1ee6bb09b1372dd744a0e01cedaf090c8d448
> ---
>  arch/arm64/kernel/entry.S | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
> index 07646ef4f184..f8ad8d7fb1a2 100644
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
> @@ -182,7 +182,6 @@ alternative_else_nop_endif
>  	mrs_s	\tmp2, SYS_GCR_EL1
>  	bfi	\tmp2, \tmp, #0, #16
>  	msr_s	SYS_GCR_EL1, \tmp2
> -	isb
>  #endif
>  	.endm
>  
> @@ -194,6 +193,7 @@ alternative_else_nop_endif
>  	ldr_l	\tmp, gcr_kernel_excl
>  
>  	mte_set_gcr \tmp, \tmp2
> +	isb
>  1:
>  #endif
>  	.endm

It makes sense. I'll apply it after -rc1 once the MTE+kasan patches go
in.

Thanks.
Catalin Marinas Jan. 4, 2021, 11:49 a.m. UTC | #2
On Wed, 2 Dec 2020 23:34:58 -0800, Peter Collingbourne wrote:
> This ISB is unnecessary because we will soon do an ERET.

Applied to arm64 (for-next/fixes), thanks!

[1/1] arm64: mte: remove an ISB on kernel exit
      https://git.kernel.org/arm64/c/b614231dec78
diff mbox series

Patch

diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 07646ef4f184..f8ad8d7fb1a2 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -182,7 +182,6 @@  alternative_else_nop_endif
 	mrs_s	\tmp2, SYS_GCR_EL1
 	bfi	\tmp2, \tmp, #0, #16
 	msr_s	SYS_GCR_EL1, \tmp2
-	isb
 #endif
 	.endm
 
@@ -194,6 +193,7 @@  alternative_else_nop_endif
 	ldr_l	\tmp, gcr_kernel_excl
 
 	mte_set_gcr \tmp, \tmp2
+	isb
 1:
 #endif
 	.endm