diff mbox series

[-next,2/3] dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support

Message ID 20201209142753.683208-3-lars.povlsen@microchip.com (mailing list archive)
State New, archived
Headers show
Series pinctrl: pinctrl-microchip-sgpio: Add interrupt controller support | expand

Commit Message

Lars Povlsen Dec. 9, 2020, 2:27 p.m. UTC
This describe the new bindings for the added IRQ support in the
pinctrl-microchip-sgpio driver.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
---
 .../bindings/pinctrl/microchip,sparx5-sgpio.yaml | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Comments

Rob Herring Dec. 11, 2020, 3:31 a.m. UTC | #1
On Wed, 09 Dec 2020 15:27:52 +0100, Lars Povlsen wrote:
> This describe the new bindings for the added IRQ support in the
> pinctrl-microchip-sgpio driver.
> 
> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
> ---
>  .../bindings/pinctrl/microchip,sparx5-sgpio.yaml | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>
Linus Walleij Dec. 11, 2020, 10:50 p.m. UTC | #2
On Wed, Dec 9, 2020 at 3:28 PM Lars Povlsen <lars.povlsen@microchip.com> wrote:

> This describe the new bindings for the added IRQ support in the
> pinctrl-microchip-sgpio driver.
>
> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>

Patch applied.

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
index 08325bf77a81..df0c83cb1c6e 100644
--- a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
@@ -91,6 +91,18 @@  patternProperties:
          controlled indirectly by the "ngpios" property: (ngpios/32).
         const: 3
 
+      interrupts:
+        description: Specifies the sgpio IRQ (in parent controller)
+        maxItems: 1
+
+      interrupt-controller: true
+
+      '#interrupt-cells':
+        description:
+         Specifies the pin (port and bit) and flags, as defined in
+         defined in include/dt-bindings/interrupt-controller/irq.h
+        const: 3
+
       ngpios:
         description: The numbers of GPIO's exposed. This must be a
           multiple of 32.
@@ -118,6 +130,7 @@  required:
 
 examples:
   - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
     sgpio2: gpio@1101059c {
       #address-cells = <1>;
       #size-cells = <0>;
@@ -134,6 +147,9 @@  examples:
         gpio-controller;
         #gpio-cells = <3>;
         ngpios = <96>;
+        interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-controller;
+        #interrupt-cells = <3>;
       };
       sgpio_out2: gpio@1 {
         compatible = "microchip,sparx5-sgpio-bank";