From patchwork Tue Dec 22 15:13:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Kepplinger X-Patchwork-Id: 11986961 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1C54C433E6 for ; Tue, 22 Dec 2020 15:15:27 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B71322312E for ; Tue, 22 Dec 2020 15:15:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B71322312E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=puri.sm Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pKnGj6INhAT+D9ueHO0+GyXPlOMvXz2TJHyPZ9srtMQ=; b=pvLFUEjDtOi3OqVTR64kG7T26+ Db97Zza1YiEN476IagwsB/jkA8wtzl6jP77iP/YLPuzMEGTNyokyybalirdlGW0niX73zwd5RigqN +MfG4FR5uHRz1td34Wz4RSjBCXS/FrlB3kGkJpDQN02orRrqtsrixWChxl96y9H3HucW7UBAvMKCI HDVYUXNZE3TOS0QdOQBjWzEmZrNglWnIKXZigkMq2kdmc6vE5liOZ+CBI0vGpFZo4xc9Iq3BSklAw bPqFMDuXTVGkIqnw4HYXB6szm1rcYOOZpPWeuJKO6VTR+XzbrtmFoZbnueCceEEscWgLPjDzP2PfY TqVj2FMQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1krjMj-0003WE-Mn; Tue, 22 Dec 2020 15:14:21 +0000 Received: from comms.puri.sm ([159.203.221.185]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1krjMg-0003VS-Si for linux-arm-kernel@lists.infradead.org; Tue, 22 Dec 2020 15:14:20 +0000 Received: from localhost (localhost [127.0.0.1]) by comms.puri.sm (Postfix) with ESMTP id 4D616DF318; Tue, 22 Dec 2020 07:14:18 -0800 (PST) Received: from comms.puri.sm ([127.0.0.1]) by localhost (comms.puri.sm [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6fDrWgpGall8; Tue, 22 Dec 2020 07:14:17 -0800 (PST) From: Martin Kepplinger To: robh@kernel.org, shawnguo@kernel.org, festevam@gmail.com Subject: [PATCH v2 4/4] arm64: dts: imx8mq-librem5-r3: workaround i2c1 issue with 1GHz cpu voltage Date: Tue, 22 Dec 2020 16:13:47 +0100 Message-Id: <20201222151347.7886-5-martin.kepplinger@puri.sm> In-Reply-To: <20201222151347.7886-1-martin.kepplinger@puri.sm> References: <20201222151347.7886-1-martin.kepplinger@puri.sm> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201222_101419_053564_1A0E7292 X-CRM114-Status: UNSURE ( 9.09 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, kernel@puri.sm, Martin Kepplinger , linux-kernel@vger.kernel.org, krzk@kernel.org, linux-imx@nxp.com, kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a workaround for a hardware bug in the r3 revision that basically would stop the system due to traffic on the i2c1 bus. A cpu voltage change would trigger such traffic and that's what is avoided in order to work around it. Signed-off-by: Martin Kepplinger --- arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts index 6704ea2c72a3..0d38327043f8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts @@ -10,6 +10,12 @@ compatible = "purism,librem5r3", "purism,librem5", "fsl,imx8mq"; }; +&a53_opp_table { + opp-1000000000 { + opp-microvolt = <1000000>; + }; +}; + &accel_gyro { mount-matrix = "1", "0", "0", "0", "1", "0",