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Mon, 4 Jan 2021 06:41:45 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 4 Jan 2021 06:41:21 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 4 Jan 2021 06:41:22 -0600 Received: from a0393678-ssd.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 104Cf3bj034579; Mon, 4 Jan 2021 06:41:18 -0600 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Rob Herring , Tom Joseph , Lorenzo Pieralisi , Kishon Vijay Abraham I , Nadeem Athani Subject: [PATCH v2 3/4] dt-bindings: pci: ti, j721e: Add endpoint mode dt-bindings for TI's AM64 SoC Date: Mon, 4 Jan 2021 18:11:02 +0530 Message-ID: <20210104124103.30930-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210104124103.30930-1-kishon@ti.com> References: <20210104124103.30930-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210104_074152_244784_348A06FD X-CRM114-Status: GOOD ( 10.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pci@vger.kernel.org, linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add endpoint mode dt-bindings for TI's AM64 SoC. This is the same IP used in J7200, however AM64 is a non-coherent architecture. Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index d06f0c4464c6..447c8fe0f09e 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -16,12 +16,17 @@ allOf: properties: compatible: oneOf: - - description: PCIe EP controller in J7200 + - const: ti,am64-pcie-ep + - const: ti,j7200-pcie-ep + - const: ti,j721e-pcie-ep + - description: PCIe EP controller in AM64 items: + - const: ti,am64-pcie-ep - const: ti,j7200-pcie-ep - const: ti,j721e-pcie-ep - - description: PCIe EP controller in J721E + - description: PCIe EP controller in J7200 items: + - const: ti,j7200-pcie-ep - const: ti,j721e-pcie-ep reg: @@ -66,7 +71,6 @@ required: - power-domains - clocks - clock-names - - dma-coherent - max-functions - phys - phy-names