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dmarc=none action=none header.from=nxp.com; Received: from HE1PR0402MB3371.eurprd04.prod.outlook.com (2603:10a6:7:85::27) by HE1PR0401MB2652.eurprd04.prod.outlook.com (2603:10a6:3:83::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3721.20; Fri, 8 Jan 2021 09:27:27 +0000 Received: from HE1PR0402MB3371.eurprd04.prod.outlook.com ([fe80::3194:64d6:5a70:a91d]) by HE1PR0402MB3371.eurprd04.prod.outlook.com ([fe80::3194:64d6:5a70:a91d%4]) with mapi id 15.20.3721.024; Fri, 8 Jan 2021 09:27:27 +0000 From: Zhiqiang Hou To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lorenzo.pieralisi@arm.com, robh+dt@kernel.org, bhelgaas@google.com, shawnguo@kernel.org, leoyang.li@nxp.com, gustavo.pimentel@synopsys.com Subject: [PATCHv3 1/7] PCI: dwc: Fix a bug of the case dw_pci->ops is NULL Date: Fri, 8 Jan 2021 17:36:04 +0800 Message-Id: <20210108093610.28595-2-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210108093610.28595-1-Zhiqiang.Hou@nxp.com> References: <20210108093610.28595-1-Zhiqiang.Hou@nxp.com> X-Originating-IP: [119.31.174.73] X-ClientProxiedBy: MAXPR0101CA0019.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:c::29) To HE1PR0402MB3371.eurprd04.prod.outlook.com (2603:10a6:7:85::27) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.73) by MAXPR0101CA0019.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:c::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3742.6 via Frontend Transport; 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PTR:; CAT:NONE; SFS:(4636009)(346002)(376002)(136003)(39860400002)(366004)(396003)(316002)(478600001)(6506007)(6486002)(4326008)(52116002)(2616005)(36756003)(69590400011)(8936002)(66556008)(956004)(921005)(6512007)(1076003)(66476007)(5660300002)(66946007)(26005)(2906002)(6666004)(16526019)(8676002)(83380400001)(186003)(86362001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: 8YWEf6WYidm2wFCmuYhYEBvK8kLKltQqUUI9qiNY0a6ebsNV8TpRp8nt8GINvBFE0UZDlxUrKu3z4zKf3mdAiHJ9oa7jR2eQNik70Dq5PapGNRMwkC1Fz7KMis+CGtT1ViGO+HELal92Zt5CLP6iOFjh0JZobFLwzni3aTIe2xyOodIHKQjkZcCzH69/A8TMSj0eyBuhPkMHKruebsm5VEPUGn5HhnMS1HctkXGVvMIH4qWhjdlX8fRZEgKsdEXNV8S4ddfgVEte+6J6Mvr6lt8cyI4/n+qYh7DCAt6Vbhx3+n73xPGHM+0+pO49d2Jtv0HnQn+Ltn2L5fyZnkIgsRqH+3x+r8E0331m9HetsQZzNHLhl+7TMpdC/v/9DR5F08OS17oQGDdJqtAi5qJ8lkuEPHuuq9gvnscFCVdWCZlYHZCS7kCjkKEaFkJZHFJCd37JVPxeKsmQVYFi2BiBX8eO8nKW6ALewMCeJM99geIX7C8XsKFB21eXRDzG+8EcwtMkPY1tF0cnUf4svoUb/ot5sAKehkacRMo2kh2OFOoe7u37ntqUofamAlVHqw/aOE1z1IfEELcVbhZIU6aAS4fvX+OY0zPYeu4ImaZgEuC1DeKYshgThRiUwOuvQ6ArXuhc/rHtYJMu34H3pT/m35edBitTDGi16TDoHNN8UWKCKxiFzNodfXof5rh2gUbLu8dbMnqjG28fJ5Mf3wMaK2adIYd0srPy53/Iif8qVe0nzvjO2Fi73HglobQGcEs0OmWJXKoiFzHldto8/ULiGZNqNLjz76D13yaUBUojBy7SoXjLJySIr6AG6++3kE2aoM4rgIdvkxvX9Qa3KtzncSgca7zvbl+e1PsYF1nIf1pUmytDXdFwrwiOjM6p6dz1OrTREvDr25TwNhla9MTMryLx9Eh8NP+ZkbJdD2GdfL9UqTERsxU9Ubp+wptvBGaadWi87k+/qED8tG668YSyX4ZQqT8mUlI1jADNlCqShhk/IW40mTa2/I1JJvNetyAV X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: HE1PR0402MB3371.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jan 2021 09:27:27.6980 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: 2759dbaa-bcd9-4c04-fc7e-08d8b3b79da8 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: WDhdsTlTnMU94R149aK6VvrKibZdYRhdRtt/UB1sFwvBp9itiOqhwFdoWUy4ix1DuOVK/AzDY9dFJB4aq0lJzA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0401MB2652 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210108_042729_800886_1BC0155E X-CRM114-Status: GOOD ( 13.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: minghuan.Lian@nxp.com, Hou Zhiqiang , mingkai.hu@nxp.com, roy.zang@nxp.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Hou Zhiqiang The dw_pci->ops may be a NULL, and fix it by adding one more check. Signed-off-by: Hou Zhiqiang Reviewed-by: Rob Herring Acked-by: Gustavo Pimentel --- V3: - Rebased against the latest code base drivers/pci/controller/dwc/pcie-designware-host.c | 2 +- drivers/pci/controller/dwc/pcie-designware.c | 14 +++++++------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 516b151e0ef3..0413284fdd93 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -429,7 +429,7 @@ int dw_pcie_host_init(struct pcie_port *pp) dw_pcie_setup_rc(pp); dw_pcie_msi_init(pp); - if (!dw_pcie_link_up(pci) && pci->ops->start_link) { + if (!dw_pcie_link_up(pci) && pci->ops && pci->ops->start_link) { ret = pci->ops->start_link(pci); if (ret) goto err_free_msi; diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 645fa1892375..cf895c12f71f 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -141,7 +141,7 @@ u32 dw_pcie_read_dbi(struct dw_pcie *pci, u32 reg, size_t size) int ret; u32 val; - if (pci->ops->read_dbi) + if (pci->ops && pci->ops->read_dbi) return pci->ops->read_dbi(pci, pci->dbi_base, reg, size); ret = dw_pcie_read(pci->dbi_base + reg, size, &val); @@ -156,7 +156,7 @@ void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t size, u32 val) { int ret; - if (pci->ops->write_dbi) { + if (pci->ops && pci->ops->write_dbi) { pci->ops->write_dbi(pci, pci->dbi_base, reg, size, val); return; } @@ -171,7 +171,7 @@ void dw_pcie_write_dbi2(struct dw_pcie *pci, u32 reg, size_t size, u32 val) { int ret; - if (pci->ops->write_dbi2) { + if (pci->ops && pci->ops->write_dbi2) { pci->ops->write_dbi2(pci, pci->dbi_base2, reg, size, val); return; } @@ -186,7 +186,7 @@ static u32 dw_pcie_readl_atu(struct dw_pcie *pci, u32 reg) int ret; u32 val; - if (pci->ops->read_dbi) + if (pci->ops && pci->ops->read_dbi) return pci->ops->read_dbi(pci, pci->atu_base, reg, 4); ret = dw_pcie_read(pci->atu_base + reg, 4, &val); @@ -200,7 +200,7 @@ static void dw_pcie_writel_atu(struct dw_pcie *pci, u32 reg, u32 val) { int ret; - if (pci->ops->write_dbi) { + if (pci->ops && pci->ops->write_dbi) { pci->ops->write_dbi(pci, pci->atu_base, reg, 4, val); return; } @@ -273,7 +273,7 @@ static void __dw_pcie_prog_outbound_atu(struct dw_pcie *pci, u8 func_no, { u32 retries, val; - if (pci->ops->cpu_addr_fixup) + if (pci->ops && pci->ops->cpu_addr_fixup) cpu_addr = pci->ops->cpu_addr_fixup(pci, cpu_addr); if (pci->iatu_unroll_enabled) { @@ -481,7 +481,7 @@ int dw_pcie_link_up(struct dw_pcie *pci) { u32 val; - if (pci->ops->link_up) + if (pci->ops && pci->ops->link_up) return pci->ops->link_up(pci); val = readl(pci->dbi_base + PCIE_PORT_DEBUG1);