| Message ID | 20210128112314.1304160-2-hsinyi@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/mediatek: add support for mediatek SOC MT8183 | expand |
On 28/01/2021 12:23, Hsin-Yi Wang wrote: > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > property name must include only lowercase and '-' > > Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Applied to v5.11-next/dts64 Thanks > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index 5b782a4769e7e..6c84ccb709af6 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -1011,7 +1011,7 @@ rdma0: rdma@1400b000 { > clocks = <&mmsys CLK_MM_DISP_RDMA0>; > iommus = <&iommu M4U_PORT_DISP_RDMA0>; > mediatek,larb = <&larb0>; > - mediatek,rdma_fifo_size = <5120>; > + mediatek,rdma-fifo-size = <5120>; > mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; > }; > > @@ -1023,7 +1023,7 @@ rdma1: rdma@1400c000 { > clocks = <&mmsys CLK_MM_DISP_RDMA1>; > iommus = <&iommu M4U_PORT_DISP_RDMA1>; > mediatek,larb = <&larb0>; > - mediatek,rdma_fifo_size = <2048>; > + mediatek,rdma-fifo-size = <2048>; > mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; > }; > >
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 5b782a4769e7e..6c84ccb709af6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1011,7 +1011,7 @@ rdma0: rdma@1400b000 { clocks = <&mmsys CLK_MM_DISP_RDMA0>; iommus = <&iommu M4U_PORT_DISP_RDMA0>; mediatek,larb = <&larb0>; - mediatek,rdma_fifo_size = <5120>; + mediatek,rdma-fifo-size = <5120>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; }; @@ -1023,7 +1023,7 @@ rdma1: rdma@1400c000 { clocks = <&mmsys CLK_MM_DISP_RDMA1>; iommus = <&iommu M4U_PORT_DISP_RDMA1>; mediatek,larb = <&larb0>; - mediatek,rdma_fifo_size = <2048>; + mediatek,rdma-fifo-size = <2048>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; };