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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id e12sm75784pjj.23.2021.02.01.10.14.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Feb 2021 10:14:20 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Subject: [PATCH 26/31] coresight: etm4x: Run arch feature detection on the CPU Date: Mon, 1 Feb 2021 11:13:46 -0700 Message-Id: <20210201181351.1475223-27-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210201181351.1475223-1-mathieu.poirier@linaro.org> References: <20210201181351.1475223-1-mathieu.poirier@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210201_181427_270887_3A5F4032 X-CRM114-Status: GOOD ( 15.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Suzuki K Poulose As we are about to add support for system register based devices, we don't get an AMBA pid. So, the detection code could check the system registers running on the CPU to check for the architecture specific features. Thus we move the arch feature detection to run on the CPU. We cannot always read the PID from the HW, as the PID could be overridden by DT for broken devices. So, use the PID from AMBA layer if available. Cc: Mathieu Poirier Cc: Mike Leach Cc: liuqi115@huawei.com Signed-off-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20210110224850.1880240-25-suzuki.poulose@arm.com Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index c3e458af618a..fc26ecbc2d87 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -60,6 +60,7 @@ static u64 etm4_get_access_type(struct etmv4_config *config); static enum cpuhp_state hp_online; struct etm4_init_arg { + unsigned int pid; struct etmv4_drvdata *drvdata; struct csdev_access *csa; }; @@ -884,6 +885,8 @@ static void etm4_init_arch_data(void *info) etm4_os_unlock_csa(drvdata, csa); etm4_cs_unlock(drvdata, csa); + etm4_check_arch_features(drvdata, init_arg->pid); + /* find all capabilities of the tracing unit */ etmidr0 = etm4x_relaxed_read32(csa, TRCIDR0); @@ -1750,6 +1753,7 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) init_arg.drvdata = drvdata; init_arg.csa = &desc.access; + init_arg.pid = etm_pid; if (smp_call_function_single(drvdata->cpu, etm4_init_arch_data, &init_arg, 1)) @@ -1794,8 +1798,6 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) drvdata->boot_enable = true; } - etm4_check_arch_features(drvdata, etm_pid); - return 0; }