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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:message-id:mime-version:subject:from :to:cc; bh=mqWmHE42/s6gPzA1fc3dXOQLiShFY7rWgRdN3hlvQ18=; b=DL7KShXWzD7YejQuoceDLpd+N42zA/Y/TD6wyloUGK7Swupwy1oipr1dhkYx9IIw67 eJIixh10Ima5AGhouiuZMglKpdF3VCg9tk9quJ34oda6txVWwMcUg3+pJzSTKJ4IbZir KaBkEXgUL+YRIQsiHjfSGGw8MXUOWtZdWk6/b46MXc6bAWtUCkNrlQTkF1M1RWje5lpz RxwdXCRRJUVjuOAXyuMlDhsTdVFA5k62aQmoqMnULEXI46Ve885pTrR37CeTt4MH++VR GxwbiMxH3aC5QPMmdwoDrvkASnl/DVoqPhmKCESvBQirnJONtIEmMhdKAVGiSlF1FutT jeTw== X-Gm-Message-State: AOAM533SHDUi9HDaKKBIEEKhxMbjjAXy+XUjzaCLL4MtRTu0j+n9EKG/ xuybOx2cXWNkXL/1ERMuGp612x7FZNQxppqFRw== X-Google-Smtp-Source: ABdhPJwIpU1qgfHhoXG1v93Qd2i7DjQh2/0OMsvbT7B2NZVoUqIJ5eo00+aW3Cf7tVTPwL6oZWGpXQ6hd/koHi/9ow== X-Received: from jingzhangos.c.googlers.com ([fda3:e722:ac3:10:2b:ff92:c0a8:513]) (user=jingzhangos job=sendgmr) by 2002:a25:bec2:: with SMTP id k2mr4013508ybm.42.1612500267530; Thu, 04 Feb 2021 20:44:27 -0800 (PST) Date: Fri, 5 Feb 2021 04:44:03 +0000 Message-Id: <20210205044403.1559010-1-jingzhangos@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.30.0.365.g02bc693789-goog Subject: [PATCH] KVM: arm64: Remove redundant check for S2FWB From: Jing Zhang To: maz@kernel.org, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, catalin.marinas@arm.com, will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, qperret@google.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210204_234431_452703_BB0C59AF X-CRM114-Status: GOOD ( 14.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jing Zhang Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove redundant check for CPU feature S2FWB in dcache flush code to save some CPU cycles for every memslot flush and unmapping. And move the S2FWB check to outer functions to avoid future redundancy and keep consistent with other usage like in access_dcsw and kvm_arch_prepare_memory_region. Signed-off-by: Jing Zhang --- arch/arm64/kvm/hyp/pgtable.c | 9 ++------- arch/arm64/kvm/mmu.c | 3 ++- 2 files changed, 4 insertions(+), 8 deletions(-) base-commit: a8ac864a7d6dbc2fc43081b1eecd9e0183065d47 diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c index bdf8e55ed308..afd57564b1cb 100644 --- a/arch/arm64/kvm/hyp/pgtable.c +++ b/arch/arm64/kvm/hyp/pgtable.c @@ -642,9 +642,6 @@ int kvm_pgtable_stage2_map(struct kvm_pgtable *pgt, u64 addr, u64 size, static void stage2_flush_dcache(void *addr, u64 size) { - if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) - return; - __flush_dcache_area(addr, size); } @@ -670,7 +667,8 @@ static int stage2_unmap_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, if (page_count(virt_to_page(childp)) != 1) return 0; - } else if (stage2_pte_cacheable(pte)) { + } else if (stage2_pte_cacheable(pte) && + !cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) { need_flush = true; } @@ -846,9 +844,6 @@ int kvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size) .flags = KVM_PGTABLE_WALK_LEAF, }; - if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) - return 0; - return kvm_pgtable_walk(pgt, addr, size, &walker); } diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c index 7d2257cc5438..53130ed23304 100644 --- a/arch/arm64/kvm/mmu.c +++ b/arch/arm64/kvm/mmu.c @@ -1458,7 +1458,8 @@ void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled) * If switching it off, need to clean the caches. * Clean + invalidate does the trick always. */ - if (now_enabled != was_enabled) + if (now_enabled != was_enabled && + !cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) stage2_flush_vm(vcpu->kvm); /* Caches are now on, stop trapping VM ops (until a S/W op) */