From patchwork Mon Feb 8 13:56:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 12075631 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A389C433DB for ; Mon, 8 Feb 2021 14:16:57 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 387B264E5A for ; Mon, 8 Feb 2021 14:16:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 387B264E5A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=baikalelectronics.ru Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=9ZNVZxOtC4Y2M0fRw2IGb9dJpch2vPcHkSDQyx0asV0=; b=RSpN3gKFiDTDY//TMjEHwJwqk JJKuqYDkHdD8HnQIBSMSOf5YOtNj1Qlf2EYOtwWGMq+YHxZmOjmvf+1Xyg5nzS782MuwA/irdoXl/ 4wzfQcwDrQjGSZiV4s/WCQvp+nuhdzCo8zQhOhATay+so6lvFtJWG2jzKx24QWqRh4EDco4sbMEwa lSaBhW6ODQ5hxPEagk9ARVq8TGQAr7jmsKwfG/ANLhI4KNpb+S+7l0Y+ldw12LhbDsCS5Siz5bgi/ iZTnvTI6YJMm1JAr07rfJT1qlEqTxZ2amzPYxCFM+cJcnzIj70ssoltrhVkHBB6cWXPLMX1md22Ba VILccF4Xg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l97Ja-0000Jo-36; Mon, 08 Feb 2021 14:14:58 +0000 Received: from mail.baikalelectronics.com ([87.245.175.226] helo=mail.baikalelectronics.ru) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l97B3-00048w-GA for linux-arm-kernel@lists.infradead.org; Mon, 08 Feb 2021 14:06:14 +0000 From: Serge Semin To: Rob Herring , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Johan Hovold , Maxime Ripard , Joao Pinto , Lars Persson , Maxime Coquelin Subject: [PATCH v2 23/24] net: stmmac: Use pclk to set MDC clock frequency Date: Mon, 8 Feb 2021 16:56:07 +0300 Message-ID: <20210208135609.7685-24-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20210208135609.7685-1-Sergey.Semin@baikalelectronics.ru> References: <20210208135609.7685-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210208_090610_009415_9C143C74 X-CRM114-Status: GOOD ( 12.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Serge Semin , Alexey Malahov , Serge Semin , Vyacheslav Mitrofanov , Pavel Parkhomenko , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In accordance with [1] the MDC clock frequency is supposed to be selected with respect to the CSR clock frequency. CSR clock can be either tied to the DW MAC system clock (GMAC main clock) or supplied via a dedicated clk_csr_i signal. Current MDC clock selection procedure handles the former case while having no support of the later one. That's wrong for the devices which have separate system and CSR clocks. Let's fix it by first trying to get the synchro-signal rate from the "pclk" clock, if it hasn't been specified then fall-back to the "stmmaceth" clock. [1] DesignWare Cores Ethernet MAC Universal Databook, Revision 3.73a, October 2013, p. 424. Signed-off-by: Serge Semin --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index a8dec219c295..03acf14d76de 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -206,7 +206,12 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) { u32 clk_rate; - clk_rate = clk_get_rate(priv->plat->stmmac_clk); + /* If APB clock has been specified then it is supposed to be used + * to select the CSR mode. Otherwise the application clock is the + * source of the periodic signal for the CSR interface. + */ + clk_rate = clk_get_rate(priv->plat->pclk) ?: + clk_get_rate(priv->plat->stmmac_clk); /* Platform provided default clk_csr would be assumed valid * for all other cases except for the below mentioned ones.