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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/baikal,bt1-gmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Baikal-T1 DW GMAC Network Interface
+
+maintainers:
+ - Serge Semin <fancer.lancer@gmail.com>
+
+description:
+ Baikal-T1 is equipped with two DW GMAC v3.73a network interfaces. Each of
+ them doesn't have any on-SoC PHY attached, but instead exports RGMII
+ interface to connect any compatible physical layer transceiver.
+
+select:
+ properties:
+ compatible:
+ contains:
+ const: baikal,bt1-gmac
+
+ required:
+ - compatible
+
+allOf:
+ - $ref: "snps,dwmac.yaml#"
+
+properties:
+ compatible:
+ items:
+ - const: baikal,bt1-gmac
+ - const: snps,dwmac-3.73a
+ - const: snps,dwmac
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ const: macirq
+
+ clocks:
+ minItems: 4
+ maxItems: 4
+
+ clock-names:
+ minItems: 4
+ maxItems: 4
+ contains:
+ enum:
+ - stmmaceth
+ - pclk
+ - tx
+ - ptp_ref
+
+ ngpios:
+ description:
+ Baikal-T1 GMAC have been created with one GPI and one GPO ports
+ enabled. So there are total two GPIOs available.
+ const: 2
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ tx-internal-delay-ps:
+ description:
+ DW MAC Tx clocks generator has been designed to always add 2ns delay
+ of TXC with respect to TXD.
+ const: 2000
+
+ rx-fifo-depth:
+ const: 16384
+
+ tx-fifo-depth:
+ const: 16384
+
+ axi-config:
+ type: object
+
+ properties:
+ snps,wr_osr_lmt:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Maximum write outstanding requests is limited with 4
+ maximum: 3
+
+ snps,rd_osr_lmt:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Maximum read outstanding requests is limited with 4
+ maximum: 3
+
+ snps,blen:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: AXI-bus burst length width is limited with just 4 bits
+ items:
+ enum: [16, 8, 4, 0]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - phy-mode
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ethernet@1f05e000 {
+ compatible = "baikal,bt1-dwmac", "snps,dwmac-3.73a", "snps,dwmac";
+ reg = <0x1f05e000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <2>;
+
+ interrupts = <72>;
+ interrupt-names = "macirq";
+
+ clocks = <&ccu_sys 1>, <&ccu_axi 3>, <&ccu_sys 2>, <&ccu_sys 3>;
+ clock-names = "pclk", "stmmaceth", "tx", "ptp_ref";
+
+ resets = <&ccu_axi 3>;
+ reset-names = "stmmaceth";
+
+ ngpios = <2>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ phy-mode = "rgmii-rxid";
+ tx-internal-delay-ps = <2000>;
+
+ rx-fifo-depth = <16384>;
+ tx-fifo-depth = <16384>;
+
+ axi-config {
+ snps,wr_osr_lmt = <0x3>;
+ snps,rd_osr_lmt = <0x3>;
+ snps,blen = <0 0 0 0 16 8 4>;
+ };
+ };
+...