From patchwork Mon Feb 8 14:08:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 12075677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6939AC433DB for ; Mon, 8 Feb 2021 14:18:44 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 05C0F64E2E for ; Mon, 8 Feb 2021 14:18:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 05C0F64E2E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=baikalelectronics.ru Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=1WiJ71GVBfLpByA5hxSFVizJfy3B3VI2IWjpr/Zt1I4=; b=x/8VJkQKG7kaC6q7kuDqe5iJK BcXTIBMpLsRT+9Jhrs7VeoCWmgnlyMP6mUNBADUAO5w+wJeEwm/SHodTdJedS6Vvv8V1Qk0Edz0nH vHOzNJMyj0TXkVQzv6JLTgo6j4gEEc/PtajCLQV0DxxYm5wrW3uZRZg1NScnknJSIn8idNC58GVyU c4sIV1XqE85omiOgMB3AdF7BzlzqvP4uIufKULLksWVsONDNkgtJ1/NlchShm/7yd1uTv81/n2Ylf wMalv2MR92/bWWOouxFY6z/E8TKa5zIKJLkGAMHyBOmoPTNbmtnWRZveUeb/MnOweVpA2J4lAbNJX CK0uE6dhA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l97Lf-0001FE-Ul; Mon, 08 Feb 2021 14:17:08 +0000 Received: from mail.baikalelectronics.com ([87.245.175.226] helo=mail.baikalelectronics.ru) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l97DG-0005Dn-QD for linux-arm-kernel@lists.infradead.org; Mon, 08 Feb 2021 14:08:31 +0000 From: Serge Semin To: Rob Herring , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Maxime Coquelin Subject: [PATCH 04/16] net: stmmac: Introduce DMA core cleanup method Date: Mon, 8 Feb 2021 17:08:08 +0300 Message-ID: <20210208140820.10410-5-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20210208140820.10410-1-Sergey.Semin@baikalelectronics.ru> References: <20210208140820.10410-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210208_090827_203587_391229C1 X-CRM114-Status: GOOD ( 13.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Serge Semin , Alexey Malahov , Serge Semin , Vyacheslav Mitrofanov , Pavel Parkhomenko , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Similarly to the MAC core cleanup method let's introduce the DMA core cleanup method, since we need have a way to get the DMA registers back to their initial state while the whole interface reset is unavailable for the particular DW MAC IP-core setup, like in case of GPIs and GPOs support. For now we've created the DMA cleanup method for the DW GMAC IP only, since the chip we've got has been equipped with that IP and we lack the documents to add and test the rest of the IPs support. Signed-off-by: Serge Semin --- drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c | 1 + drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h | 1 + drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c | 12 ++++++++++++ drivers/net/ethernet/stmicro/stmmac/hwif.h | 3 +++ 4 files changed, 17 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c index 2a04d9d45160..bae63e1420f2 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c @@ -246,6 +246,7 @@ static void dwmac1000_rx_watchdog(void __iomem *ioaddr, u32 riwt, const struct stmmac_dma_ops dwmac1000_dma_ops = { .reset = dwmac_dma_reset, + .clean = dwmac_dma_clean, .init = dwmac1000_dma_init, .init_rx_chan = dwmac_dma_init_rx, .init_tx_chan = dwmac_dma_init_tx, diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h index fa919bf75e19..f6e759d039d7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h @@ -145,5 +145,6 @@ void dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan); int dwmac_dma_interrupt(void __iomem *ioaddr, struct stmmac_extra_stats *x, u32 chan); int dwmac_dma_reset(void __iomem *ioaddr); +void dwmac_dma_clean(void __iomem *ioaddr); #endif /* __DWMAC_DMA_H__ */ diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c index 6ddfc689e77b..2186e95d5aa4 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c @@ -26,6 +26,18 @@ int dwmac_dma_reset(void __iomem *ioaddr) 10000, 200000); } +void dwmac_dma_clean(void __iomem *ioaddr) +{ + /* Clean the basic DMA registers up */ + writel(0, ioaddr + DMA_INTR_ENA); + writel(0x00020100, ioaddr + DMA_BUS_MODE); + writel(0, ioaddr + DMA_RCV_BASE_ADDR); + writel(0, ioaddr + DMA_TX_BASE_ADDR); + writel(0x00100000, ioaddr + DMA_CONTROL); + writel(0x00110001, ioaddr + DMA_AXI_BUS_MODE); + writel(0x0001FFFF, ioaddr + DMA_STATUS); +} + /* CSR1 enables the transmit DMA to check for new descriptor */ void dwmac_enable_dma_transmission(void __iomem *ioaddr) { diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h index 3f5eed8333a5..dea5a4d17677 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -169,6 +169,7 @@ struct dma_features; struct stmmac_dma_ops { /* DMA core initialization */ int (*reset)(void __iomem *ioaddr); + void (*clean)(void __iomem *ioaddr); void (*init)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg, int atds); void (*init_chan)(void __iomem *ioaddr, @@ -219,6 +220,8 @@ struct stmmac_dma_ops { #define stmmac_reset(__priv, __args...) \ stmmac_do_callback(__priv, dma, reset, __args) +#define stmmac_dma_clean(__priv, __args...) \ + stmmac_do_void_callback(__priv, dma, clean, __args) #define stmmac_dma_init(__priv, __args...) \ stmmac_do_void_callback(__priv, dma, init, __args) #define stmmac_init_chan(__priv, __args...) \