| Message ID | 20210225132736.26429-1-a-govindraju@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems | expand |
On 25/02/21 6:57 pm, Aswath Govindraju wrote: > According to latest errata of J721e [1], HS400 mode is not supported > in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2 > subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v > in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode. > > Also, update the itap delay values for all the MMCSD subsystems according > the latest J721e data sheet[2] > > [1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf > [2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf > > Fixes: e6dc10f200da ("arm64: dts: ti: j721e-main: Add SDHCI nodes") > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Thanks Kishon > --- > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 17 ++++++++++++++++- > 1 file changed, 16 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index 8c84dafb7125..f1e7da3dfa27 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -1042,13 +1042,16 @@ > assigned-clocks = <&k3_clks 91 1>; > assigned-clock-parents = <&k3_clks 91 2>; > bus-width = <8>; > - mmc-hs400-1_8v; > + mmc-hs200-1_8v; > mmc-ddr-1_8v; > ti,otap-del-sel-legacy = <0xf>; > ti,otap-del-sel-mmc-hs = <0xf>; > ti,otap-del-sel-ddr52 = <0x5>; > ti,otap-del-sel-hs200 = <0x6>; > ti,otap-del-sel-hs400 = <0x0>; > + ti,itap-del-sel-legacy = <0x10>; > + ti,itap-del-sel-mmc-hs = <0xa>; > + ti,itap-del-sel-ddr52 = <0x3>; > ti,trm-icp = <0x8>; > ti,strobe-sel = <0x77>; > dma-coherent; > @@ -1069,9 +1072,15 @@ > ti,otap-del-sel-sdr25 = <0xf>; > ti,otap-del-sel-sdr50 = <0xc>; > ti,otap-del-sel-ddr50 = <0xc>; > + ti,itap-del-sel-legacy = <0x0>; > + ti,itap-del-sel-sd-hs = <0x0>; > + ti,itap-del-sel-sdr12 = <0x0>; > + ti,itap-del-sel-sdr25 = <0x0>; > + ti,itap-del-sel-ddr50 = <0x2>; > ti,trm-icp = <0x8>; > ti,clkbuf-sel = <0x7>; > dma-coherent; > + sdhci-caps-mask = <0x2 0x0>; > }; > > main_sdhci2: mmc@4f98000 { > @@ -1089,9 +1098,15 @@ > ti,otap-del-sel-sdr25 = <0xf>; > ti,otap-del-sel-sdr50 = <0xc>; > ti,otap-del-sel-ddr50 = <0xc>; > + ti,itap-del-sel-legacy = <0x0>; > + ti,itap-del-sel-sd-hs = <0x0>; > + ti,itap-del-sel-sdr12 = <0x0>; > + ti,itap-del-sel-sdr25 = <0x0>; > + ti,itap-del-sel-ddr50 = <0x2>; > ti,trm-icp = <0x8>; > ti,clkbuf-sel = <0x7>; > dma-coherent; > + sdhci-caps-mask = <0x2 0x0>; > }; > > usbss0: cdns-usb@4104000 { >
On Thu, 25 Feb 2021 18:57:36 +0530, Aswath Govindraju wrote: > According to latest errata of J721e [1], HS400 mode is not supported > in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2 > subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v > in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode. > > Also, update the itap delay values for all the MMCSD subsystems according > the latest J721e data sheet[2] > > [...] Hi Aswath Govindraju, I have applied the following to branch ti-k3-dts-next on [1]. Thank you! [1/1] arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems commit: 9e3faed4dc176d06dc2bed5f16a33085af10fb1c All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent up the chain during the next merge window (or sooner if it is a relevant bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. [1] git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux.git
On 10:59-20210301, Kishon Vijay Abraham I wrote: > On 25/02/21 6:57 pm, Aswath Govindraju wrote: > > According to latest errata of J721e [1], HS400 mode is not supported > > in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2 > > subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v > > in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode. > > > > Also, update the itap delay values for all the MMCSD subsystems according > > the latest J721e data sheet[2] > > > > [1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf > > [2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf > > > > Fixes: e6dc10f200da ("arm64: dts: ti: j721e-main: Add SDHCI nodes") > > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> > > Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> In some offline testing, I realized that the patch wont apply cleanly to e6dc10f200da cd48ce86a4d0c1ffec86aa46a26da993c9af5f53 might be a better candidate for this - I will drop the patch from my queue in the morning, could you update the patch with a new rev with appropriate Fixes?
Hi Nishanth, On 05/03/21 10:44 am, Nishanth Menon wrote: > On 10:59-20210301, Kishon Vijay Abraham I wrote: >> On 25/02/21 6:57 pm, Aswath Govindraju wrote: >>> According to latest errata of J721e [1], HS400 mode is not supported >>> in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2 >>> subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v >>> in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode. >>> >>> Also, update the itap delay values for all the MMCSD subsystems according >>> the latest J721e data sheet[2] >>> >>> [1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf >>> [2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf >>> >>> Fixes: e6dc10f200da ("arm64: dts: ti: j721e-main: Add SDHCI nodes") >>> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> >> >> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> > > > In some offline testing, I realized that the patch wont apply cleanly to e6dc10f200da > > cd48ce86a4d0c1ffec86aa46a26da993c9af5f53 might be a better candidate for > this - I will drop the patch from my queue in the morning, could you > update the patch with a new rev with appropriate Fixes? > Sorry, I'll send a respin(v2) of this patch after correcting the fixes tag to, Fixes: cd48ce86a4d0 ("arm64: dts: ti: k3-j721e-common-proc-board: Add support for SD card UHS modes") Thanks, Aswath
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 8c84dafb7125..f1e7da3dfa27 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1042,13 +1042,16 @@ assigned-clocks = <&k3_clks 91 1>; assigned-clock-parents = <&k3_clks 91 2>; bus-width = <8>; - mmc-hs400-1_8v; + mmc-hs200-1_8v; mmc-ddr-1_8v; ti,otap-del-sel-legacy = <0xf>; ti,otap-del-sel-mmc-hs = <0xf>; ti,otap-del-sel-ddr52 = <0x5>; ti,otap-del-sel-hs200 = <0x6>; ti,otap-del-sel-hs400 = <0x0>; + ti,itap-del-sel-legacy = <0x10>; + ti,itap-del-sel-mmc-hs = <0xa>; + ti,itap-del-sel-ddr52 = <0x3>; ti,trm-icp = <0x8>; ti,strobe-sel = <0x77>; dma-coherent; @@ -1069,9 +1072,15 @@ ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr50 = <0xc>; ti,otap-del-sel-ddr50 = <0xc>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; + ti,itap-del-sel-ddr50 = <0x2>; ti,trm-icp = <0x8>; ti,clkbuf-sel = <0x7>; dma-coherent; + sdhci-caps-mask = <0x2 0x0>; }; main_sdhci2: mmc@4f98000 { @@ -1089,9 +1098,15 @@ ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr50 = <0xc>; ti,otap-del-sel-ddr50 = <0xc>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; + ti,itap-del-sel-ddr50 = <0x2>; ti,trm-icp = <0x8>; ti,clkbuf-sel = <0x7>; dma-coherent; + sdhci-caps-mask = <0x2 0x0>; }; usbss0: cdns-usb@4104000 {
According to latest errata of J721e [1], HS400 mode is not supported in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2 subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode. Also, update the itap delay values for all the MMCSD subsystems according the latest J721e data sheet[2] [1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf [2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf Fixes: e6dc10f200da ("arm64: dts: ti: j721e-main: Add SDHCI nodes") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-)