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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=4ECUgkoGREkKZOm9t4R+RTCdTGWy+OUrTPPjtPvrKJ0=; b=OmS9WUIOXtc9xKeRFT3iwzbgTFaxM4dU4RFyVh4BlZAVba3a5Qn3ePpgbQWvivjAS6 bMhxkRyQGzByDirmlImmHrw/YzGqRk04xUX2j5YUHD9HZz4khWwC3G5FTOiwz6tfeTls lla4uWxobbIVQbydXacbGiuyOatDUYifGFR3JblymIvEZEuJu2m3Z6uTvlNU04ZPIjo9 GSpDPEO2tihSgbGgldq39D4yiLTkroiROSA9cyQw3MV09QIRtucbZU5H1IjCOcHH6egP WHNekwpBsIHPBJiglr6h4ZI2xGHdaKLmX4wTfqdc2Rm6jXbzbF2AgXqNtz1KdjmtYrWL fFvw== X-Gm-Message-State: AOAM530kJb4lPzfw8iXVLy5Say32yQYI3WcjKAwkMfd95j4sBJqSMRzJ 7Iw6lIXFzW8nWHD7yavLjYYQ0QX4axlF X-Google-Smtp-Source: ABdhPJzYehOnz8tCTfBHour34wAjOBD226lW09MVR9xTEXwscem/T/fZ6V3Usp4MMihrNAsA/4FgAQyZpAB1 X-Received: from r2d2-qp.c.googlers.com ([fda3:e722:ac3:10:28:9cb1:c0a8:1652]) (user=qperret job=sendgmr) by 2002:a1c:6a05:: with SMTP id f5mr14281wmc.184.1615818973676; Mon, 15 Mar 2021 07:36:13 -0700 (PDT) Date: Mon, 15 Mar 2021 14:35:16 +0000 In-Reply-To: <20210315143536.214621-1-qperret@google.com> Message-Id: <20210315143536.214621-17-qperret@google.com> Mime-Version: 1.0 References: <20210315143536.214621-1-qperret@google.com> X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog Subject: [PATCH v5 16/36] arm64: asm: Provide set_sctlr_el2 macro From: Quentin Perret To: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com Cc: android-kvm@google.com, seanjc@google.com, mate.toth-pal@arm.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com, kvmarm@lists.cs.columbia.edu, tabba@google.com, ardb@kernel.org, mark.rutland@arm.com, dbrazdil@google.com, qperret@google.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210315_143615_202487_E07CAE8B X-CRM114-Status: GOOD ( 11.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org We will soon need to turn the EL2 stage 1 MMU on and off in nVHE protected mode, so refactor the set_sctlr_el1 macro to make it usable for that purpose. Acked-by: Will Deacon Suggested-by: Will Deacon Signed-off-by: Quentin Perret --- arch/arm64/include/asm/assembler.h | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index ca31594d3d6c..fb651c1f26e9 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -676,11 +676,11 @@ USER(\label, ic ivau, \tmp2) // invalidate I line PoU .endm /* - * Set SCTLR_EL1 to the passed value, and invalidate the local icache + * Set SCTLR_ELx to the @reg value, and invalidate the local icache * in the process. This is called when setting the MMU on. */ -.macro set_sctlr_el1, reg - msr sctlr_el1, \reg +.macro set_sctlr, sreg, reg + msr \sreg, \reg isb /* * Invalidate the local I-cache so that any instructions fetched @@ -692,6 +692,14 @@ USER(\label, ic ivau, \tmp2) // invalidate I line PoU isb .endm +.macro set_sctlr_el1, reg + set_sctlr sctlr_el1, \reg +.endm + +.macro set_sctlr_el2, reg + set_sctlr sctlr_el2, \reg +.endm + /* * Check whether to yield to another runnable task from kernel mode NEON code * (which runs with preemption disabled).