@@ -244,3 +244,46 @@ cpsw3g_phy1: ethernet-phy@1 {
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};
+
+&mailbox0_cluster2 {
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 2>;
+ ti,mbox-tx = <1 0 2>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 2>;
+ ti,mbox-tx = <3 0 2>;
+ };
+};
+
+&mailbox0_cluster3 {
+ status = "disabled";
+};
+
+&mailbox0_cluster4 {
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 2>;
+ ti,mbox-tx = <1 0 2>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 2>;
+ ti,mbox-tx = <3 0 2>;
+ };
+};
+
+&mailbox0_cluster5 {
+ status = "disabled";
+};
+
+&mailbox0_cluster6 {
+ mbox_m4_0: mbox-m4-0 {
+ ti,mbox-rx = <0 0 2>;
+ ti,mbox-tx = <1 0 2>;
+ };
+};
+
+&mailbox0_cluster7 {
+ status = "disabled";
+};
Add the sub-mailbox nodes that are used to communicate between MPU and various remote processors present in the AM64x SoCs for the AM642 SK board. These include the R5F remote processors in the two dual-R5F clusters (MAIN_R5FSS0 & MAIN_R5FSS1) in the MAIN domain; and a M4 processor in the MCU safety island. These sub-mailbox nodes utilize the System Mailbox clusters 2, 4 and 6. The remaining clusters 3, 5 and 7 are currently not used, and so are disabled. Clusters 0 and 1 were never added to the dts file as they do not support interrupts towards the A53 core. The sub-mailbox nodes added match the hard-coded mailbox configuration used within the TI RTOS IPC software packages. The R5F processor sub-systems are assumed to be running in Split mode, so a sub-mailbox node is used by each of the R5F cores. Only the sub-mailbox node for the first R5F core in each cluster is used in case of a Single-CPU mode for that R5F cluster. The nodes are all identical to those added on the AM64x EVM board to maintain firmware compatibility between the two boards. NOTE: The cluster nodes only have the Mailbox IP interrupt outputs that are routed to the GIC_SPI. The sub-mailbox nodes' irq-id are indexing into the listed interrupts, with the usr-id using the actual interrupt output line number from the Mailbox IP. Signed-off-by: Suman Anna <s-anna@ti.com> --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 43 ++++++++++++++++++++++++++ 1 file changed, 43 insertions(+)