| Message ID | 20210329221209.1718079-1-ndesaulniers@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] ARM: kprobes: test-thumb: fix for LLVM_IAS=1 | expand |
Thanks for the patch. It looks good to me, and I double checked ARM architecture reference manual for V7 and can confirm the missing operand in these instructions is not specified as optional. Reviewed-by: Jian Cai <jiancai@google.com> On Mon, Mar 29, 2021 at 3:12 PM Nick Desaulniers <ndesaulniers@google.com> wrote: > > There's a few instructions that GAS infers operands but Clang doesn't; > from what I can tell the Arm ARM doesn't say these are optional. > > F5.1.257 TBB, TBH T1 Halfword variant > F5.1.238 STREXD T1 variant > F5.1.84 LDREXD T1 variant > > Link: https://github.com/ClangBuiltLinux/linux/issues/1309 > Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> > --- > See: > https://lore.kernel.org/linux-arm-kernel/CAMj1kXE5uw4+zV3JVpfA2drOD5TZVMs5a_E5wrrnzjEYc=E_fA@mail.gmail.com/ > for what I'd consider V1. The previous issues with .w suffixes have been > fixed or have fixes pending in LLVM: > * BL+DBG: https://reviews.llvm.org/D97236 > * ORN/ORNS: https://reviews.llvm.org/D99538 > * RSB/RSBS: https://reviews.llvm.org/D99542 > I'd have expected the Arm ARM to use curly braces to denote optional > operands (see also "F5.1.167 RSB, RSBS (register)" for an example). > > arch/arm/probes/kprobes/test-thumb.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/arm/probes/kprobes/test-thumb.c b/arch/arm/probes/kprobes/test-thumb.c > index 456c181a7bfe..4e11f0b760f8 100644 > --- a/arch/arm/probes/kprobes/test-thumb.c > +++ b/arch/arm/probes/kprobes/test-thumb.c > @@ -441,21 +441,21 @@ void kprobe_thumb32_test_cases(void) > "3: mvn r0, r0 \n\t" > "2: nop \n\t") > > - TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,"]", > + TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,", lsl #1]", > "9: \n\t" > ".short (2f-1b-4)>>1 \n\t" > ".short (3f-1b-4)>>1 \n\t" > "3: mvn r0, r0 \n\t" > "2: nop \n\t") > > - TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,"]", > + TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,", lsl #1]", > "9: \n\t" > ".short (2f-1b-4)>>1 \n\t" > ".short (3f-1b-4)>>1 \n\t" > "3: mvn r0, r0 \n\t" > "2: nop \n\t") > > - TEST_RRX("tbh [r",1,9f, ", r",14,1,"]", > + TEST_RRX("tbh [r",1,9f, ", r",14,1,", lsl #1]", > "9: \n\t" > ".short (2f-1b-4)>>1 \n\t" > ".short (3f-1b-4)>>1 \n\t" > @@ -468,10 +468,10 @@ void kprobe_thumb32_test_cases(void) > > TEST_UNSUPPORTED("strexb r0, r1, [r2]") > TEST_UNSUPPORTED("strexh r0, r1, [r2]") > - TEST_UNSUPPORTED("strexd r0, r1, [r2]") > + TEST_UNSUPPORTED("strexd r0, r1, r2, [r2]") > TEST_UNSUPPORTED("ldrexb r0, [r1]") > TEST_UNSUPPORTED("ldrexh r0, [r1]") > - TEST_UNSUPPORTED("ldrexd r0, [r1]") > + TEST_UNSUPPORTED("ldrexd r0, r1, [r1]") > > TEST_GROUP("Data-processing (shifted register) and (modified immediate)") > > -- > 2.31.0.291.g576ba9dcdaf-goog >
diff --git a/arch/arm/probes/kprobes/test-thumb.c b/arch/arm/probes/kprobes/test-thumb.c index 456c181a7bfe..4e11f0b760f8 100644 --- a/arch/arm/probes/kprobes/test-thumb.c +++ b/arch/arm/probes/kprobes/test-thumb.c @@ -441,21 +441,21 @@ void kprobe_thumb32_test_cases(void) "3: mvn r0, r0 \n\t" "2: nop \n\t") - TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,"]", + TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,", lsl #1]", "9: \n\t" ".short (2f-1b-4)>>1 \n\t" ".short (3f-1b-4)>>1 \n\t" "3: mvn r0, r0 \n\t" "2: nop \n\t") - TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,"]", + TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,", lsl #1]", "9: \n\t" ".short (2f-1b-4)>>1 \n\t" ".short (3f-1b-4)>>1 \n\t" "3: mvn r0, r0 \n\t" "2: nop \n\t") - TEST_RRX("tbh [r",1,9f, ", r",14,1,"]", + TEST_RRX("tbh [r",1,9f, ", r",14,1,", lsl #1]", "9: \n\t" ".short (2f-1b-4)>>1 \n\t" ".short (3f-1b-4)>>1 \n\t" @@ -468,10 +468,10 @@ void kprobe_thumb32_test_cases(void) TEST_UNSUPPORTED("strexb r0, r1, [r2]") TEST_UNSUPPORTED("strexh r0, r1, [r2]") - TEST_UNSUPPORTED("strexd r0, r1, [r2]") + TEST_UNSUPPORTED("strexd r0, r1, r2, [r2]") TEST_UNSUPPORTED("ldrexb r0, [r1]") TEST_UNSUPPORTED("ldrexh r0, [r1]") - TEST_UNSUPPORTED("ldrexd r0, [r1]") + TEST_UNSUPPORTED("ldrexd r0, r1, [r1]") TEST_GROUP("Data-processing (shifted register) and (modified immediate)")
There's a few instructions that GAS infers operands but Clang doesn't; from what I can tell the Arm ARM doesn't say these are optional. F5.1.257 TBB, TBH T1 Halfword variant F5.1.238 STREXD T1 variant F5.1.84 LDREXD T1 variant Link: https://github.com/ClangBuiltLinux/linux/issues/1309 Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> --- See: https://lore.kernel.org/linux-arm-kernel/CAMj1kXE5uw4+zV3JVpfA2drOD5TZVMs5a_E5wrrnzjEYc=E_fA@mail.gmail.com/ for what I'd consider V1. The previous issues with .w suffixes have been fixed or have fixes pending in LLVM: * BL+DBG: https://reviews.llvm.org/D97236 * ORN/ORNS: https://reviews.llvm.org/D99538 * RSB/RSBS: https://reviews.llvm.org/D99542 I'd have expected the Arm ARM to use curly braces to denote optional operands (see also "F5.1.167 RSB, RSBS (register)" for an example). arch/arm/probes/kprobes/test-thumb.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)