| Message ID | 20210401005702.28271-2-zev@bewilderbeest.net (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | simplify Aspeed VUART SIRQ polarity DT config | expand |
On Thu, 1 Apr 2021 at 00:57, Zev Weiss <zev@bewilderbeest.net> wrote: > > This property ties SIRQ polarity to SCU register bits that don't > necessarily have any direct relationship to it; the only use of it > was removed in commit c82bf6e133d30e0f9172a20807814fa28aef0f67. > > Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Reviewed-by: Joel Stanley <joel@jms.id.au> > --- > Documentation/devicetree/bindings/serial/8250.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml > index f54cae9ff7b2..491b9297432d 100644 > --- a/Documentation/devicetree/bindings/serial/8250.yaml > +++ b/Documentation/devicetree/bindings/serial/8250.yaml > @@ -188,6 +188,7 @@ properties: > offset and bit number to identify how the SIRQ polarity should be > configured. One possible data source is the LPC/eSPI mode bit. Only > applicable to aspeed,ast2500-vuart. > + deprecated: true > > required: > - reg > -- > 2.31.1 >
diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml index f54cae9ff7b2..491b9297432d 100644 --- a/Documentation/devicetree/bindings/serial/8250.yaml +++ b/Documentation/devicetree/bindings/serial/8250.yaml @@ -188,6 +188,7 @@ properties: offset and bit number to identify how the SIRQ polarity should be configured. One possible data source is the LPC/eSPI mode bit. Only applicable to aspeed,ast2500-vuart. + deprecated: true required: - reg
This property ties SIRQ polarity to SCU register bits that don't necessarily have any direct relationship to it; the only use of it was removed in commit c82bf6e133d30e0f9172a20807814fa28aef0f67. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> --- Documentation/devicetree/bindings/serial/8250.yaml | 1 + 1 file changed, 1 insertion(+)