| Message ID | 20210422040914.47788-15-ilya.lipnitskiy@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | mtk_eth_soc: fixes and performance improvements | expand |
On Wed, Apr 21, 2021 at 09:09:14PM -0700, Ilya Lipnitskiy wrote: > Replace a tight busy-wait loop without a pause with a standard > readx_poll_timeout_atomic routine with a 5 us poll period. > > Tested by booting a MT7621 device to ensure the driver initializes > properly. > > Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> > --- > drivers/net/ethernet/mediatek/mtk_eth_soc.c | 29 +++++++++------------ > drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +- > 2 files changed, 14 insertions(+), 17 deletions(-) > > diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c > index 8c863322587e..720d73d0c007 100644 > --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c > +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c > @@ -2037,25 +2037,22 @@ static int mtk_set_features(struct net_device *dev, netdev_features_t features) > /* wait for DMA to finish whatever it is doing before we start using it again */ > static int mtk_dma_busy_wait(struct mtk_eth *eth) > { > - unsigned long t_start = jiffies; > + u32 val; > + int ret; > + unsigned int reg; Nit: Reverse christmass tree. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c index 8c863322587e..720d73d0c007 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -2037,25 +2037,22 @@ static int mtk_set_features(struct net_device *dev, netdev_features_t features) /* wait for DMA to finish whatever it is doing before we start using it again */ static int mtk_dma_busy_wait(struct mtk_eth *eth) { - unsigned long t_start = jiffies; + u32 val; + int ret; + unsigned int reg; - while (1) { - if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { - if (!(mtk_r32(eth, MTK_QDMA_GLO_CFG) & - (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY))) - return 0; - } else { - if (!(mtk_r32(eth, MTK_PDMA_GLO_CFG) & - (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY))) - return 0; - } + if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) + reg = MTK_QDMA_GLO_CFG; + else + reg = MTK_PDMA_GLO_CFG; - if (time_after(jiffies, t_start + MTK_DMA_BUSY_TIMEOUT)) - break; - } + ret = readx_poll_timeout_atomic(__raw_readl, eth->base + reg, val, + !(val & (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY)), + 5, MTK_DMA_BUSY_TIMEOUT_US); + if (ret) + dev_err(eth->dev, "DMA init timeout\n"); - dev_err(eth->dev, "DMA init timeout\n"); - return -1; + return ret; } static int mtk_dma_init(struct mtk_eth *eth) diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h index 214da569e869..2e4356ccf778 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -214,7 +214,7 @@ #define MTK_TX_DMA_BUSY BIT(1) #define MTK_RX_DMA_EN BIT(2) #define MTK_TX_DMA_EN BIT(0) -#define MTK_DMA_BUSY_TIMEOUT HZ +#define MTK_DMA_BUSY_TIMEOUT_US 1000000 /* QDMA Reset Index Register */ #define MTK_QDMA_RST_IDX 0x1A08
Replace a tight busy-wait loop without a pause with a standard readx_poll_timeout_atomic routine with a 5 us poll period. Tested by booting a MT7621 device to ensure the driver initializes properly. Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> --- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 29 +++++++++------------ drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +- 2 files changed, 14 insertions(+), 17 deletions(-)