Message ID | 20210510040045.13225-9-peng.fan@oss.nxp.com (mailing list archive) |
---|---|
State | New, archived |
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Mon, 10 May 2021 03:29:45 +0000 From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com> To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Peng Fan <peng.fan@nxp.com> Subject: [PATCH V3 08/13] dt-bindings: imx: gpcv2: add support for optional resets Date: Mon, 10 May 2021 12:00:40 +0800 Message-Id: <20210510040045.13225-9-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210510040045.13225-1-peng.fan@oss.nxp.com> References: <20210510040045.13225-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
Series |
soc: imx: gpcv2: support i.MX8MM
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expand
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On Mon, 10 May 2021 12:00:40 +0800, Peng Fan (OSS) wrote: > From: Lucas Stach <l.stach@pengutronix.de> > > For some domains the resets of the devices in the domain are not > automatically triggered. Add an optional resets property to allow > the GPC driver to trigger those resets explicitly. > > The resets belong to devices located inside the power domain, > which need to be held in reset across the power-up sequence. So we > have no means to specify what each reset is in a generic power-domain > binding. Same situation as with the clocks in this binding actually. > > Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > .../devicetree/bindings/power/fsl,imx-gpcv2.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml index a96e6dbf1858..eb248f24dce6 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml @@ -66,6 +66,16 @@ properties: power-supply: true + resets: + description: | + A number of phandles to resets that need to be asserted during + power-up sequencing of the domain. The resets belong to devices + located inside the power domain, which need to be held in reset + across the power-up sequence. So no means to specify what each + reset is in a generic power-domain binding. + minItems: 1 + maxItems: 4 + required: - '#power-domain-cells' - reg