Message ID | 20210514210725.32720-3-s-anna@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Fri, 14 May 2021 16:07:40 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Fri, 14 May 2021 16:07:40 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 14EL7eoJ029992; Fri, 14 May 2021 16:07:40 -0500 Received: from localhost ([10.250.35.60]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 14EL7e5w005872; Fri, 14 May 2021 16:07:40 -0500 From: Suman Anna <s-anna@ti.com> To: Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org> Subject: [PATCH 2/3] arm64: dts: ti: k3-am64: Add SA2UL address space to Main CBASS ranges Date: Fri, 14 May 2021 16:07:23 -0500 Message-ID: <20210514210725.32720-3-s-anna@ti.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210514210725.32720-1-s-anna@ti.com> References: <20210514210725.32720-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210514_140741_948353_D80EC26E X-CRM114-Status: UNSURE ( 9.33 ) X-CRM114-Notice: Please train this message. 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Series |
Add crypto nodes for J7200 and AM64x
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expand
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diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi index de6805b0c72c..8ccd03ee3036 100644 --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi @@ -77,6 +77,7 @@ cbass_main: bus@f4000 { <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0_CFG */ <0x00 0x3cd00000 0x00 0x3cd00000 0x00 0x00000200>, /* TIMERMGR0_CONFIG */ <0x00 0x3f004000 0x00 0x3f004000 0x00 0x00000400>, /* GICSS0_REGS */ + <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA2_UL0 */ <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>, /* CTRL_MMR0 */ <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */ <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMASS */
Add the address space for the SA2UL in MAIN domain to the ranges property of the cbass_main interconnect node so that the addresses within the corresponding sram nodes and its children can be translated properly by the relevant OF address API. Signed-off-by: Suman Anna <s-anna@ti.com> --- arch/arm64/boot/dts/ti/k3-am64.dtsi | 1 + 1 file changed, 1 insertion(+)