From patchwork Tue May 25 15:22:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 12279401 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEB08C2B9F8 for ; Tue, 25 May 2021 15:47:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8F7DF610CB for ; Tue, 25 May 2021 15:47:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8F7DF610CB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ZM6Wq8TRhEhh1oR64kPFzGGKnGRaWfMVHIMoLaWepFU=; b=ISWstceOBDxU75 bLfzFNx/IHFOA3IqR3bUrhc9U4fJiOe6BPrVvoe1+dta8rqT50rHENAJlqoGy42M3w69nJyGtFYn7 k3P05HnvvOvCB27w18/d3Uzb6MvzHDdBHcqPE5H3GgwW0XmUt36L25n2k2If4RTQDXjQ/KciiCg25 VDOwPLZvbxnSYpFRvb/Xd8X/UgT7AQKfxh46H6O02y0L0czDhYrseLI2T6+HRdAcjl6TTyrGvLqGB OPHyQJC2nVewnT2qoNzbpWaGSMMXlGwpphx/R/HB2QJO31h7shgMzMhtIAqth+KQdeHJItGswHRG9 W1uDyq8QpA14jalmi84A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1llZED-0066iu-Fg; Tue, 25 May 2021 15:44:22 +0000 Received: from mail-ej1-x62e.google.com ([2a00:1450:4864:20::62e]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1llYtP-005xND-W0; Tue, 25 May 2021 15:22:53 +0000 Received: by mail-ej1-x62e.google.com with SMTP id z12so46506727ejw.0; Tue, 25 May 2021 08:22:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0dWrSJpZgMpxHVFRG9kZb8CpcNYTDRtnmDZpgsmj8Rc=; b=MdfMs6/dhvVBw49gZTRFiPTStZUqCMgEmt0xtVc7bas1RRaRDs/hRo5f0+d+IYWMpG gsxv9E+3CXuwJ+d2SfKWcxF68ZqFfusNAEaKoqGXqzCSRP6eldxMC6kP/kz6OlSmJe/I BdPOOGaCADR+ZuOzbvuiX7vH6RQExYrQw6upv3qa4X7uzID51quN/Z/dp5DEjEDGas8n +C6MYGK2Js5MaTbrc6CAmnvjpVnp0chuaOH0dzAZKTZb4oW3AiP1gq0iClpstztTFQfs APifNEjBwKdyk+71jw+D9sqxSlCxaSNNiWK31KOMtcOCJ2EJwdvw/0mCu/lilESyf2Yg 79Qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0dWrSJpZgMpxHVFRG9kZb8CpcNYTDRtnmDZpgsmj8Rc=; b=opjPIPMgPg2RR/3Ax5+DdxsMGnsplrQ7IkA6tEJ8VO57XsTJ394vRf7N8O920HOxiY H7vh4E/GPkRsWkerVDQtvY3hZBUrr9rBSoAqgyNkL87azd9ddxzTgmXE8wk4x2QWY4Go LfJfxfoHvIvNFGrksN3LjYrOKuQ86HqZ6PBxQHwalbWk8w6vT0hn7LyNYbv7EoSFsqYt mBixe8xwHISjX/qQHhOGRVVnxPVEqCPldfZXXZuCd5TaSgTMNcvij14kKKvvg4Az9DWR I6Mf1aIJY3nHTJb/6P1BvDngFG/IuxURNvHHtOcX1Ex7EC3bD1Qm46lKjAUlX2zRZQXz cRCA== X-Gm-Message-State: AOAM531/9lbIlOKacbraDcBWwyusxKOIBkrojMb2N3GlQPaAyeQUBwK6 PazNUzc0IVPPtdxqAdbT7w== X-Google-Smtp-Source: ABdhPJxUmk0NJaqt0+4yPQJO0ZiY/x4r0Cwts2PIsVWDXopMSox53XAdL3PaTtxCFgA5pV3ndUQQpA== X-Received: by 2002:a17:906:e08a:: with SMTP id gh10mr29017133ejb.533.1621956170435; Tue, 25 May 2021 08:22:50 -0700 (PDT) Received: from localhost.localdomain ([2a02:810b:f40:e00:b55:da44:4fe2:2760]) by smtp.googlemail.com with ESMTPSA id e23sm11212945eds.2.2021.05.25.08.22.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 May 2021 08:22:50 -0700 (PDT) From: Alex Bee To: Ezequiel Garcia , Mauro Carvalho Chehab , Rob Herring , Heiko Stuebner , Philipp Zabel , Lee Jones , Greg Kroah-Hartman , linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org Cc: Alex Bee , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH 01/10] ARM: dts: rockchip: add power controller for RK322x Date: Tue, 25 May 2021 17:22:16 +0200 Message-Id: <20210525152225.154302-2-knaerzche@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210525152225.154302-1-knaerzche@gmail.com> References: <20210525152225.154302-1-knaerzche@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210525_082252_082436_3F78B79A X-CRM114-Status: GOOD ( 13.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the power controller node and the correspondending qos nodes for RK322x. Also add the power-domain property to the nodes that are already present. Signed-off-by: Alex Bee --- arch/arm/boot/dts/rk322x.dtsi | 112 ++++++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 5774bc309eb7..c8095ede7d7a 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include / { #address-cells = <1>; @@ -240,6 +241,65 @@ u2phy1_host: host-port { status = "disabled"; }; }; + + power: power-controller { + compatible = "rockchip,rk3228-power-controller"; + #power-domain-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + power-domain@RK3228_PD_VIO { + reg = ; + clocks = <&cru ACLK_HDCP>, + <&cru SCLK_HDCP>, + <&cru ACLK_IEP>, + <&cru HCLK_IEP>, + <&cru ACLK_RGA>, + <&cru HCLK_RGA>, + <&cru SCLK_RGA>; + pm_qos = <&qos_hdcp>, + <&qos_iep>, + <&qos_rga_r>, + <&qos_rga_w>; + #power-domain-cells = <0>; + }; + + power-domain@RK3228_PD_VOP { + reg = ; + clocks =<&cru ACLK_VOP>, + <&cru DCLK_VOP>, + <&cru HCLK_VOP>; + pm_qos = <&qos_vop>; + #power-domain-cells = <0>; + }; + + power-domain@RK3228_PD_VPU { + reg = ; + clocks = <&cru ACLK_VPU>, + <&cru HCLK_VPU>; + pm_qos = <&qos_vpu>; + #power-domain-cells = <0>; + }; + + power-domain@RK3228_PD_RKVDEC { + reg = ; + clocks = <&cru ACLK_RKVDEC>, + <&cru HCLK_RKVDEC>, + <&cru SCLK_VDEC_CABAC>, + <&cru SCLK_VDEC_CORE>; + pm_qos = <&qos_rkvdec_r>, + <&qos_rkvdec_w>; + #power-domain-cells = <0>; + }; + + power-domain@RK3228_PD_GPU { + reg = ; + clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu>; + }; + + }; + }; uart0: serial@11010000 { @@ -546,6 +606,7 @@ gpu: gpu@20000000 { "ppmmu1"; clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; clock-names = "bus", "core"; + power-domains = <&power RK3228_PD_GPU>; resets = <&cru SRST_GPU_A>; status = "disabled"; }; @@ -556,6 +617,7 @@ vpu_mmu: iommu@20020800 { interrupts = ; clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; clock-names = "aclk", "iface"; + power-domains = <&power RK3228_PD_VPU>; #iommu-cells = <0>; status = "disabled"; }; @@ -566,6 +628,7 @@ vdec_mmu: iommu@20030480 { interrupts = ; clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; clock-names = "aclk", "iface"; + power-domains = <&power RK3228_PD_RKVDEC>; #iommu-cells = <0>; status = "disabled"; }; @@ -576,6 +639,7 @@ vop: vop@20050000 { interrupts = ; clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + power-domains = <&power RK3228_PD_VOP>; resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>; reset-names = "axi", "ahb", "dclk"; iommus = <&vop_mmu>; @@ -598,6 +662,7 @@ vop_mmu: iommu@20053f00 { interrupts = ; clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; clock-names = "aclk", "iface"; + power-domains = <&power RK3228_PD_VOP>; #iommu-cells = <0>; status = "disabled"; }; @@ -608,6 +673,7 @@ rga: rga@20060000 { interrupts = ; clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; clock-names = "aclk", "hclk", "sclk"; + power-domains = <&power RK3228_PD_VIO>; resets = <&cru SRST_RGA>, <&cru SRST_RGA_A>, <&cru SRST_RGA_H>; reset-names = "core", "axi", "ahb"; }; @@ -618,6 +684,7 @@ iep_mmu: iommu@20070800 { interrupts = ; clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; clock-names = "aclk", "iface"; + power-domains = <&power RK3228_PD_VIO>; #iommu-cells = <0>; status = "disabled"; }; @@ -792,6 +859,51 @@ gmac: ethernet@30200000 { status = "disabled"; }; + qos_iep: qos@31030080 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31030080 0x20>; + }; + + qos_rga_w: qos@31030100 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31030100 0x20>; + }; + + qos_hdcp: qos@31030180 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31030180 0x20>; + }; + + qos_rga_r: qos@31030200 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31030200 0x20>; + }; + + qos_vpu: qos@31040000 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31040000 0x20>; + }; + + qos_gpu: qos@31050000 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31050000 0x20>; + }; + + qos_vop: qos@31060000 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31060000 0x20>; + }; + + qos_rkvdec_r: qos@31070000 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31070000 0x20>; + }; + + qos_rkvdec_w: qos@31070080 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31070080 0x20>; + }; + gic: interrupt-controller@32010000 { compatible = "arm,gic-400"; interrupt-controller;